Timo Aaltonen pushed to branch ubuntu at X Strike Force / lib / mesa
Commits:
f66496d2 by Emil Velikov at 2017-12-21T17:34:52+00:00
docs: add sha256 checksums for 17.3.1
Signed-off-by: Emil Velikov <emil.veli...@collabora.com>
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ecd5f3c3 by Samuel Pitoiset at 2017-12-27T11:22:33+00:00
radv/gfx9: fix primitive topology when adjacency is used
Found by inspection.
Cc: 17.3 <mesa-sta...@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
(cherry picked from commit 9f54675dbe01518ec4b71e8fc9b4f6e777b27185)
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71ab5da9 by Dave Airlie at 2017-12-27T12:06:28+00:00
radv/gfx9: add support for 3d images to blit 2d paths
This add support for a 3D image reading path to the blit 2d paths,
like I did for the clear paths.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for
now."'
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Tested-by: Alex Smith <asm...@feralinteractive.com>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 9f675bf934f7bdfa6a1e10c4d3a3b74e418046c1)
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b8ad2673 by Dave Airlie at 2017-12-27T12:06:45+00:00
radv: handle depth/stencil image copy with layouts better. (v3.1)
If we are doing a general->general transfer with HIZ enabled,
we want to hit the tile surface disable bits in radv_emit_fb_ds_state,
however we never get the current layout to know we are in general
and meta hardcoded the transfer layout which is always tile enabled.
This fixes:
dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general
v2: refactor some shared helpers for blit patches
v3: we only need multiple render passes as they should be compatible.
v3.1: use enum (Bas)
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Cc: "17.2 17.3" <mesa-sta...@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 821b5379f04cc536de714d0898b1cff25c46b5b9)
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8a1db81b by Dave Airlie at 2017-12-27T12:07:01+00:00
radv/meta: fix blit paths for depth/stencil (v2.1)
This fixes the layout issue for the blit path as well.
This fixes:
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint*
v2: use compatible render passes.
v2.1: use enum
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Cc: "17.2 17.3" <mesa-sta...@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit fbac9f86aaffb102ee9dca6ade0fdf04fcd28d84)
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9f44726f by Dave Airlie at 2017-12-27T12:07:01+00:00
radv: fix issue with multisample positions and interp_var_at_sample.
This fixes vmfaults seen on vega with:
dEQP-VK.pipeline.multisample_interpolation.sample_interpolate_at_single_sample_.128_128_1.samples_1
These were caused by the don't allocate cmask but it was just accidental.
The actual problem was the shader was trying to get the sample positions from
a buffer, but the buffer was never getting configured to contain them, as the
previous shader never needed them.
Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Fixes: 1171b304f3 (radv: overhaul fragment shader sample positions.)
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit b81f1a592b02d3d1928ab232c97675b12cad19fc)
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c29a4bb0 by Dave Airlie at 2017-12-27T12:07:01+00:00
radv/gfx9: add 3d sampler image->buffer copy shader. (v3)
On GFX9 we must access 3D textures with 3D samplers AFAICS.
This fixes:
dEQP-VK.api.image_clearing.core.clear_color_image.3d.single_layer
on GFX9 for me.
v1.1: fix tex->sampler_dim to dim
v2: send layer in from outside
v3: don't regress on pre-gfx9
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for
now."'
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Tested-by: Alex Smith <asm...@feralinteractive.com>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit a99fa7e8a2b7d36dc26cf2dbf5f38f55c674f719)
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4fdc7068 by Bas Nieuwenhuizen at 2017-12-27T12:07:01+00:00
radv: Fix DCC compatible formats.
DCC was disabled when the image format is !!supported, which is one ! too many.
Ironically the commit that introduced it was supposed to lead to more DCC use
...
Fixes: 969537d9358 "radv: Add support for more DCC compression with
VK_KHR_image_format_list."
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 70b5e85fc3a79214b4f25db0e6d8fcc32d62a2f1)
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ef9b0b1a by Samuel Pitoiset at 2017-12-27T12:11:41+00:00
radv: use a faster version for nir_op_pack_half_2x16
This patch is ported from RadeonSI and it has two effects.
It fixes a rendering issue which affects F1 2017 and Dawn
of War 3 (Vega only) because LLVM was ending up by generating
the new v_mad_mix_{hi,lo} instructions which appear to be
buggy in some way. Not sure if Mesa is generating something
wrong or if the issue is in LLVM only. Anyway, that explains why
the DOW3 issue can't be reproduced with GL on Vega.
It also improves performance because v_cvt_pkrtz_f16 is faster,
and because I guess the rounding mode behaviour is similar between
GL and VK, we can use it. About performance, it improves Talos
by +3/4% but I don't see any other impacts.
No CTS regressions on Polaris.
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 5f81a43535e8512cef26ea3dcd1e3a489bd5a1bb)
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c324da8b by Tapani Pälli at 2017-12-27T12:14:40+00:00
mesa: add AllowGLSLCrossStageInterpolationMismatch workaround
This fixes issues seen with certain versions of Unreal Engine 4 editor
and games built with that using GLSL 4.30.
v2: add driinfo_gallium change (Emil Velikov)
Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97852
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103801
Acked-by: Andres Gomez <ago...@igalia.com>
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
(cherry picked from commit faccbaf3faf9a7cdcda3e4032fafd0f6064459bd)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.veli...@collabora.com>
Conflicts:
src/mesa/drivers/dri/i965/brw_context.c
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427b6003 by Tapani Pälli at 2017-12-27T12:15:13+00:00
drirc: set allow_glsl_cross_stage_interpolation_mismatch for more games
Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
Suggested-by: Darius Spitznagel <d.spitzna...@goodbytez.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104288
Acked-by: Kenneth Graunke <kenn...@whitecape.org>
(cherry picked from commit fcfb42364698647b63eb45fe5ff653cc4372c1bf)
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65b14ee7 by Dave Airlie at 2017-12-27T23:16:12+00:00
radv: don't do format replacement on tc compat htile surfaces.
For copies the texture unit needs to know the depth format so
it can read the htile data properly.
This fixes:
dEQP-VK.renderpass.suballocation.formats.d32_sfloat_s8_uint.load.clear
Fixes: ad3d98da9f (radv: enable tc compatible htile for d32s8 also.)
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit d2acf97e49e104a45fd8aa0cbe3ad30d0dc37596)
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1a7af354 by Brendan King at 2017-12-27T23:16:29+00:00
egl: link libEGL against the dynamic version of libglapi
Note: the following happens only when using slibtool.
Since this is a very serious breakage, we will keep the workaround until
a better solution is available.
DRI modules store the address of the dispatch table in a TLS variable,
_glapi_tls_Dispatch.
Changes to the way libEGL is built in d884d8d0077c16d459b1 resulted in
it being statically linked against libglapi, and thus containing its own
copy of _glapi_tls_Dispatch. The result was that some applications would
fail to work (e.g. deqp-egl, which dynamically loads libEGL), due to the
DRI module storing the dispatch table address in one copy of
_glapi_tls_Dispatch, and libEGL obtaining the address from another copy
of the variable.
Fixes: d884d8d0077c16d459b1 "egl/dri: link directly to libglapi.so"
Signed-off-by: Brendan King <brendan.k...@imgtec.com>
Signed-off-by: Eric Engestrom <eric.engest...@imgtec.com>
Reviewed-by: Emil Velikov <emil.veli...@collabora.com>
(cherry picked from commit e491bffc5c8da9fa0f7c08f78a7701ed5705d163)
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f8f202bc by Eric Engestrom at 2017-12-27T23:16:34+00:00
egl: let each platform decided how to handle LIBGL_ALWAYS_SOFTWARE
My refactor in 47273d7312cb5b5b6b0b9 missed this early return; because
of it, setting UseFallback one layer above actually prevented the
software path from being used.
Remove this early return and let each platform's dri2_initialize_*()
decide what it can do with the LIBGL_ALWAYS_SOFTWARE restriction.
platform_{surfaceless,x11,wayland} were already handling it themselves.
Fixes: 47273d7312cb5b5b6b0b9 "egl: set UseFallback if
LIBGL_ALWAYS_SOFTWARE is set"
Signed-off-by: Eric Engestrom <eric.engest...@imgtec.com>
Reviewed-by: Emil Velikov <emil.veli...@collabora.com>
Reported-by: Brendan King <brendan.k...@imgtec.com>
(cherry picked from commit 2f421651aca9c0a308c8a632d1847bbd0598e294)
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a086fb90 by Rob Herring at 2018-01-08T20:49:46+00:00
egl/android: Fix build break with dri2_initialize_android _EGLDisplay parameter
Commit 2f421651aca9 ("egl: let each platform decided how to handle
LIBGL_ALWAYS_SOFTWARE") broke the build due to copy-n-paste of misnamed
function parameter.:
src/egl/drivers/dri2/platform_android.c:1183:8: error: use of undeclared
identifier 'disp'
Rather than just fixing 'disp', rename the function parameter
'dpy' to
'disp' to align with the other EGL platforms' implementations.
Fixes: 2f421651aca9 ("egl: let each platform decided how to handle
LIBGL_ALWAYS_SOFTWARE")
Reviewed-by: Tapani Pälli <tapani.pa...@intel.com>
Acked-by: Eric Engestrom <eric.engest...@imgtec.com>
Signed-off-by: Rob Herring <r...@kernel.org>
(cherry picked from commit aa187fe7bfac856207a5feee36e17120a6ee9d22)
Signed-off-by: Emil Velikov <emil.veli...@collabora.com>
Conflicts:
src/egl/drivers/dri2/platform_android.c
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535f2425 by Emil Velikov at 2018-01-08T20:50:49+00:00
Update version to 17.3.2
Signed-off-by: Emil Velikov <emil.veli...@collabora.com>
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0f27052e by Emil Velikov at 2018-01-08T21:33:07+00:00
docs: add release notes for 17.3.2
Signed-off-by: Emil Velikov <emil.veli...@collabora.com>
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3a67ca68 by Emil Velikov at 2018-01-09T16:08:51+00:00
docs: add sha256 checksums for 17.3.2
Signed-off-by: Emil Velikov <emil.veli...@collabora.com>
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7295b97d by Juan A. Suarez Romero at 2018-01-12T21:38:08+01:00
cherry-ignore: intel/fs: Use the original destination region for int MUL
lowering
regression: The commit is causing a regression
(https://bugs.freedesktop.org/show_bug.cgi?id=103626)
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
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b5bdc368 by Lucas Stach at 2018-01-12T21:38:08+01:00
etnaviv: disable in-place resolve for non-supertiled surfaces
The in-place resolve probably has some additional restrictions when not
operating on a super tiled surface. Disable it on non-supertiled surfaces
for now to work around a GPU hang.
Fixes: 78ade659569e ("etnaviv: Do GC3000 resolve-in-place when
possible")
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.st...@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
(cherry picked from commit 0158565924564ec2edca7acd0ccbc33a369ea50d)
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23539c0f by Alex Smith at 2018-01-12T21:38:08+01:00
anv: Add missing unlock in anv_scratch_pool_alloc
Fixes hangs seen due to the lock not being released here.
Signed-off-by: Alex Smith <asm...@feralinteractive.com>
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
(cherry picked from commit 00a81e9909365065545a3c2dc362b645a8238fb2)
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6aea5543 by Tim Rowley at 2018-01-12T21:38:08+01:00
swr/rast: fix invalid sign masks in avx512 simdlib code
Should be 0x80000000 instead of 0x8000000.
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Bruce Cherniak <bruce.chern...@intel.com>
(cherry picked from commit 396c006d907b023f9b187db618ee2a6e4e1b8a85)
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b8ecf45c by Alex Smith at 2018-01-12T21:38:08+01:00
anv: Take write mask into account in has_color_buffer_write_enabled
If we have a color attachment, but its writes are masked, this would
have still returned true. This is inconsistent with how HasWriteableRT
in 3DSTATE_PS_BLEND is set, which does take the mask into account.
This could lead to PixelShaderHasUAV not being set in 3DSTATE_PS_EXTRA
if the fragment shader does use UAVs, meaning the fragment shader may
not be invoked because HasWriteableRT is false. Specifically, this was
seen to occur when the shader also enables early fragment tests: the
fragment shader was not invoked despite passing depth/stencil.
Fix by taking the color write mask into account in this function. This
is consistent with how things are done on i965.
Signed-off-by: Alex Smith <asm...@feralinteractive.com>
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
(cherry picked from commit 12f4e00b69e724a23504b7bd3958fb75dc462950)
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590b9b79 by Kenneth Graunke at 2018-01-12T21:38:08+01:00
i965: Require space for MI_BATCHBUFFER_END.
intel_batchbuffer_emit_dword doesn't reserve space for the DWord it
emits. In the past, we had some reserved batch space to ensure this
worked. With the switch to growing batches, we need to actually request
space so that we grow if necessary.
Fixes: 2c46a67b4138631217141f (i965: Delete BATCH_RESERVED handling.)
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
(cherry picked from commit 1c9f1a28c0738a0b1cb8626af431d18eeee3f4f1)
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3a31b5c0 by Kenneth Graunke at 2018-01-12T21:38:08+01:00
i965: Torch public intel_batchbuffer_emit_dword/float helpers.
intel_batchbuffer_emit_float is dead code, it should go.
intel_batchbuffer_emit_dword only had one user, which had bungled using
them by forgetting to call intel_batchbuffer_require_space first. So it
seems wise to delete these unsafe helpers.
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
(cherry picked from commit be144e251c548b45d0c4f9eb757a21110a73725b)
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6028fa79 by Alex Smith at 2018-01-12T21:38:08+01:00
anv: Make sure state on primary is correct after CmdExecuteCommands
After executing a secondary command buffer, we need to update certain
state on the primary command buffer to reflect changes by the secondary.
Otherwise subsequent commands may not have the correct state set.
This fixes various issues (rendering errors, GPU hangs) seen after
executing secondary command buffers in some cases.
v2 (Jason Ekstrand):
- Reset to invalid values instead of pulling from the secondary
- Change the comment to be more descriptive
Signed-off-by: Alex Smith <asm...@feralinteractive.com>
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
Cc: mesa-sta...@lists.freedesktop.org
(cherry picked from commit 4fd85617c176e9222f84fda7634a74d060e982b1)
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d37962a5 by Juan A. Suarez Romero at 2018-01-12T21:38:08+01:00
cherry-ignore: i965/fs: Use UW types when using V immediates
fixes: The commit addresses earlier commit 6132992cdb which did not land
in branch.
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
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23cb8763 by Samuel Iglesias Gonsálvez at 2018-01-12T21:38:09+01:00
anv: VkDescriptorSetLayoutBinding can have descriptorCount == 0
>From Vulkan spec:
"descriptorCount is the number of descriptors contained in the binding,
accessed in a shader as an array. If descriptorCount is zero this
binding entry is reserved and the resource must not be accessed from
any stage via this binding within any pipeline using the set layout."
Fixes:
dEQP-VK.binding_model.descriptor_update.empty_descriptor.uniform_buffer
Signed-off-by: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Cc: mesa-sta...@lists.freedesktop.org
(cherry picked from commit e63adf8b1ea56c9c2d0794f563bced765fb8300a)
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0a6e595f by Juan A. Suarez Romero at 2018-01-12T21:38:09+01:00
cherry-ignore: main: Clear shader program data whenever ProgramBinary is called
extra: The commit just references a fix for an additional change in its
v2.
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
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b9d5aab9 by Juan A. Suarez Romero at 2018-01-12T21:38:09+01:00
cherry-ignore: egl: pass the dri2_dpy to the $plat_teardown functions
fixes: The commit addresses earlier commits 40a01c9a0ef and 8d745abc009
which did not land in branch.
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
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b0e50e1e by Bas Nieuwenhuizen at 2018-01-12T21:38:09+01:00
radv: Invert condition for all samples identical during resolve.
the samples_identical instruction returns 0 if they are differet, so
we have to do the extra work if the result is 0, not if it is != 0.
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan
driver"
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit c39947ce3046d4339305f2bcecba2617b90edb71)
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f378cd34 by Bas Nieuwenhuizen at 2018-01-12T21:38:09+01:00
radv: Flush caches before subpass resolve.
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan
driver"
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit cebc9a119d44cb5b2b3bd5e262452e112b75fea2)
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925aa772 by Bas Nieuwenhuizen at 2018-01-12T21:38:09+01:00
radv: Fix fragment resolve destination offset.
The position start at (dst.x, dst.y), so if we want the source to
start at (src.x, src.y), we have to offset by (src.x-dst.x,src.y-dst.y).
Haven't tested that this fixed anything yet, but found by inspection.
Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex
shaders"
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 73279da41dae991afc5d4e4dbe51542060e21c59)
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f8dca92c by Bas Nieuwenhuizen at 2018-01-12T21:38:09+01:00
radv: Use correct framebuffer size for partial FS resolves.
Framebuffer is from 0,0, not (dst.x, dst.y).
Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex
shaders"
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit da192b50b246af80b87050ac75848dfac3c0afb0)
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8a39fdd7 by Bas Nieuwenhuizen at 2018-01-12T21:38:09+01:00
radv: Always use fragment resolve if dest uses DCC.
HW resolve does not support it either.
Fixes: 2a04f5481df "radv/meta: select resolve paths"
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit a636208ace00e5ba7ddb331362b3e95fd4cea422)
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bce28365 by Juan A. Suarez Romero at 2018-01-12T21:38:09+01:00
cherry-ignore: vulkan/wsi: free cmd pools
fixes: The commit addresses earlier commit d50937f137 which did not land
in branch.
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
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6b16c99f by Dave Airlie at 2018-01-12T21:38:09+01:00
radv: fix events on compute queues.
The event emission wasn't sending the correct packet for gfx8 compute
queues, which explains why it works on vega fine.
This fixes the mpv vulkan hang.
Fixes: ad61eac250 (radv: factor out eop event writing code. (v2))
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 38e4467e99ad4ea6661ef0cfc54a9942bb872f66)
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27819a4f by Dave Airlie at 2018-01-12T21:38:09+01:00
radv: fix pipeline statistics end query on compute queue
It's legal to a pipeline stat query on a compute queue,
but we'd emit the wrong packet here. This should fix it to emit
the correct packet.
Noticed while inspecting the mpv hang.
Fixes: ad61eac250 (radv: factor out eop event writing code. (v2))
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit ec1edd0fd29e50fae4aadde152d534a371ba8f6b)
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89dbb6e0 by Dave Airlie at 2018-01-12T21:38:09+01:00
radv/gfx9: fix 3d image to image transfers on compute queues.
This fixes some of the broken:
dEQP-VK.synchronization.op.multi_queue.*64x64x8* tests.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for
now."'
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit d08f2678145018763570900f38e4c95b67378df0)
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ad6bcb69 by Dave Airlie at 2018-01-12T21:38:09+01:00
radv/gfx9: fix 3d image clears on compute queues
This fixes some of the broken:
dEQP-VK.synchronization.op.multi_queue.*64x64x8* tests.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for
now."'
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 09612a62e169c7d918e6578408166c1f32db8bc4)
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8b628a17 by Dave Airlie at 2018-01-12T21:38:09+01:00
radv/gfx9: fix buffer to image for 3d images on compute queues
This fixes some of the broken:
dEQP-VK.synchronization.op.multi_queue.*64x64x8* tests.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for
now."'
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 420627e6e79fe96504bbef463433bb827e597d84)
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419551fb by Dave Airlie at 2018-01-12T21:38:09+01:00
radv/gfx9: fix block compression texture views.
This ports a fix from amdvlk, to fix the sizing for mip levels
when block compressed images are viewed using uncompressed views.
Fixes:
dEQP-VK.image.texel_view_compatible.graphic.extended*bc*
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for
now."'
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 59515780433837ad3975f8ed20b93cf2fe6870e5)
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f82c02f1 by Dave Airlie at 2018-01-12T21:38:09+01:00
radv/gfx9: use a bigger hammer to flush cb/db caches.
amdvlk is probably more subtle than this but it never uses
the inv cb/db variants, we fail some CTS tests without this.
Fixes:
dEQP-VK.renderpass.dedicated_allocation.formats.d32_sfloat_s8_uint.input*.
Fixes: c2fbeb7ca05 (radv: add GFX9 cache flushing support.)
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> (for now :-)
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 868377ab33e09a211ddc9f0ca82b15e7b40dd95b)
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b8296fc4 by Dave Airlie at 2018-01-12T21:38:09+01:00
radv/gfx9: use correct swizzle parameter to work out border swizzle.
This should fix:
dEQP-VK.pipeline.sampler.view_type.*.format.b4g4r4a4_unorm_pack16.address_modes.all_mode_clamp_to_border_opaque_black
and a few others in that area.
Fixes: b11c4a5546 (radv: add texture descriptor/fmask/cmask support for GFX9)
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit a4c23ce1b68bce0e0393f8355c0a91d52a90bdbd)
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d16639bd by Bas Nieuwenhuizen at 2018-01-12T21:38:09+01:00
Revert "radv/gfx9: fix block compression texture views."
This reverts commit 59515780433837ad3975f8ed20b93cf2fe6870e5.
The mentioned commit causes a hang in DoW3 on Vega.
Fixes: 59515780433 "radv/gfx9: fix block compression texture views."
Acked-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 516a80b579163ef0894bb2fe2922912ef8599205)
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467414c5 by Bas Nieuwenhuizen at 2018-01-12T21:38:09+01:00
radv: Use correct HTILE expanded words.
Seems like users are actually hitting 0xFFFFFFFF actually making
things broken for them, and the mad max regression is fixed, so
lets put this in once more.
v2: Use 0xf for depth-only htile. (Dave)
Fixes: af2844116fd "radv: Revert HTILE reset word to 0xFFFFFFFF."
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 5158603182fe7435bc825b09890d77eea49d2074)
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5fe6c5fd by Bas Nieuwenhuizen at 2018-01-12T21:38:09+01:00
radv: Allow writing 0 scissors.
When rasterization is disabled we can have that few.
Fixes: 76603aa90b8 "radv: Drop the default viewport when 0 viewports are
given."
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit 1c78e4f0535f3650acaf19d2ad19e4cc7bc3b0fd)
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3561eabf by Bas Nieuwenhuizen at 2018-01-12T21:38:10+01:00
ac/nir: Handle loading data from compact arrays.
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan
driver"
Reviewed-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit c99426ea831f9e38624bbd1d2f0bc54bdfaf2b6b)
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ecf2e337 by Bas Nieuwenhuizen at 2018-01-12T21:38:10+01:00
radv: Invalidate L1 for VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT.
These are just shaders reads, so we need to invalidate L1.
Fixes: 6dbb0eaccc "radv: handle subpass cache flushes"
Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
(cherry picked from commit f2c9f13ec2fdab99f5aa7f32845ee94dd1942fe9)
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cc2b5d61 by Bas Nieuwenhuizen at 2018-01-12T21:38:10+01:00
ac/nir: Sanitize location_frac for local variables.
If they were promoted from inputs/outputs, they could have a
non-zero value left over, which messed with our store handling.
Fixes: 06f05040eb "radv: Link shaders."
Reviewed-by: Timothy Arceri <tarc...@itsqueeze.com>
(cherry picked from commit 67e09c8b451e1db8bd901279160b982b0df0fa41)
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d774fe8e by Andres Gomez at 2018-01-12T21:38:10+01:00
anv: Import mako templates only during execution of anv_extensions
anv_extensions usage from anv_icd was bringing the unwanted dependency
of mako templates for the latter. We don't want that since it will
force the dependency even for distributable tarballs which was not
needed until now.
Jason suggested this approach.
v2: Patch simplification (Jason).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104551
Fixes: 0ab04ba979b ("anv: Use python to generate ICD json files")
Cc: Jason Ekstrand <jason.ekstr...@intel.com>
Cc: Emil Velikov <emil.veli...@collabora.com>
Signed-off-by: Andres Gomez <ago...@igalia.com>
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
(cherry picked from commit a1901d092c053485cdfff0a65a83f9f0987ffc62)
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9be5e0cf by Thomas Hellstrom at 2018-01-12T21:38:10+01:00
loader/dri3: Avoid freeing renderbuffers in use
Upon reception of an event that lowered the number of active back buffers,
the code would immediately try to free all back buffers with an id equal to or
higher than the new number of active back buffers.
However, that could lead to an active or to-be-active back buffer being freed,
since the old number of back buffers was used when obtaining an idle back
buffer for use.
This lead to crashes when lowering the number of active back buffers by
transitioning from page-flipping to non-page-flipping presents.
Fix this by computing the number of active back buffers only when trying to
obtain a new back buffer.
Fixes: 15e208c4cc ("loader/dri3: Don't accidently free buffer holding
new back content")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104214
Cc: "17.3" <mesa-sta...@lists.freedesktop.org>
Tested-by: Andriy.Khulap <andriy.khu...@globallogic.com>
Tested-by: Vadym Shovkoplias <vadym.shovkopl...@globallogic.com>
Reviewed-by: Michel Dänzer <michel.daen...@amd.com>
Signed-off-by: Thomas Hellstrom <thellst...@vmware.com>
(cherry picked from commit 897c54d522ab960a879b763a15e489f630c491ee)
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9a7ffd93 by Józef Kucia at 2018-01-12T21:38:10+01:00
radeonsi: fix alpha-to-coverage if color writes are disabled
If alpha-to-coverage is enabled, we have to compute alpha
even if color writes are disabled.
Signed-off-by: Józef Kucia <joseph.ku...@gmail.com>
Signed-off-by: Marek Olšák <marek.ol...@amd.com>
(cherry picked from commit f222cf3c6d6fc5d9dee3742d20aa77cfff9c39f8)
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2416223f by Florian Will at 2018-01-12T21:38:10+01:00
glsl: Respect std430 layout in lower_buffer_access
Respect the std430 rules for determining offset and size of struct
members when using a std430 buffer. std140 rules lead to wrong buffer
offsets in that case.
Fixes my test case attached in Bugzilla. No piglit changes.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104492
Reviewed-by: Timothy Arceri <tarc...@itsqueeze.com>
(cherry picked from commit 7e025def6d7d3d6bf94facd6ec6d956f40cbb31e)
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2adb90f4 by Juan A. Suarez Romero at 2018-01-18T19:52:51+00:00
Update version to 17.3.3
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
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80f5f279 by Juan A. Suarez Romero at 2018-01-18T20:02:46+00:00
docs: add release notes for 17.3.3
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
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0808ee9a by Timo Aaltonen at 2018-01-26T14:42:11+02:00
Merge tag 'mesa-17.3.3' into ubuntu
mesa-17.3.3
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9a1d7d83 by Timo Aaltonen at 2018-01-26T14:42:36+02:00
bump changelog
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58e4d891 by Timo Aaltonen at 2018-01-26T14:45:15+02:00
release to bionic
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30 changed files:
- VERSION
- bin/.cherry-ignore
- debian/changelog
- docs/relnotes/17.3.1.html
- + docs/relnotes/17.3.2.html
- + docs/relnotes/17.3.3.html
- src/amd/common/ac_nir_to_llvm.c
- src/amd/vulkan/radv_cmd_buffer.c
- src/amd/vulkan/radv_image.c
- src/amd/vulkan/radv_meta.c
- src/amd/vulkan/radv_meta.h
- src/amd/vulkan/radv_meta_blit.c
- src/amd/vulkan/radv_meta_blit2d.c
- src/amd/vulkan/radv_meta_bufimage.c
- src/amd/vulkan/radv_meta_copy.c
- src/amd/vulkan/radv_meta_resolve.c
- src/amd/vulkan/radv_meta_resolve_cs.c
- src/amd/vulkan/radv_meta_resolve_fs.c
- src/amd/vulkan/radv_pipeline.c
- src/amd/vulkan/radv_private.h
- src/amd/vulkan/radv_query.c
- src/amd/vulkan/si_cmd_buffer.c
- src/compiler/glsl/link_varyings.cpp
- src/compiler/glsl/lower_buffer_access.cpp
- src/egl/Makefile.am
- src/egl/drivers/dri2/egl_dri2.c
- src/egl/drivers/dri2/platform_android.c
- src/egl/drivers/dri2/platform_drm.c
- src/gallium/auxiliary/pipe-loader/driinfo_gallium.h
- src/gallium/drivers/etnaviv/etnaviv_rs.c
The diff was not included because it is too large.
View it on GitLab:
https://salsa.debian.org/xorg-team/lib/mesa/compare/e71bd38ecf55cf535d11be4e372f72e6a8778aa3...58e4d89172c6f263950cc3bacae9eec08046d417
---
View it on GitLab:
https://salsa.debian.org/xorg-team/lib/mesa/compare/e71bd38ecf55cf535d11be4e372f72e6a8778aa3...58e4d89172c6f263950cc3bacae9eec08046d417
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