Android.common.mk | 4 Android.mk | 12 VERSION | 2 bin/.cherry-ignore | 20 configure.ac | 45 + debian/changelog | 13 debian/control | 10 debian/rules | 2 docs/egl.html | 21 docs/relnotes/17.2.0.html | 154 +++ docs/relnotes/17.2.1.html | 199 ++++ include/EGL/egl.h | 6 include/EGL/eglext.h | 73 + include/KHR/khrplatform.h | 10 scons/gallium.py | 16 src/amd/Android.common.mk | 4 src/amd/common/ac_nir_to_llvm.c | 132 ++ src/amd/common/ac_surface.c | 58 + src/amd/vulkan/radv_cmd_buffer.c | 64 - src/amd/vulkan/radv_descriptor_set.c | 1 src/amd/vulkan/radv_device.c | 12 src/amd/vulkan/radv_formats.c | 4 src/amd/vulkan/radv_image.c | 142 ++- src/amd/vulkan/radv_meta_blit.c | 19 src/amd/vulkan/radv_meta_blit2d.c | 206 ++-- src/amd/vulkan/radv_meta_clear.c | 17 src/amd/vulkan/radv_meta_resolve.c | 7 src/amd/vulkan/radv_meta_resolve_cs.c | 15 src/amd/vulkan/radv_meta_resolve_fs.c | 7 src/amd/vulkan/radv_pipeline.c | 131 ++ src/amd/vulkan/radv_pipeline_cache.c | 3 src/amd/vulkan/radv_private.h | 3 src/amd/vulkan/radv_radeon_winsys.h | 3 src/amd/vulkan/radv_wsi.c | 8 src/amd/vulkan/si_cmd_buffer.c | 19 src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 36 src/compiler/Makefile.sources | 4 src/compiler/glsl/ast_to_hir.cpp | 2 src/compiler/glsl/ir_constant_expression.cpp | 2 src/compiler/glsl/link_uniform_initializers.cpp | 2 src/compiler/glsl/link_uniforms.cpp | 2 src/compiler/glsl/link_varyings.cpp | 3 src/compiler/glsl/linker.cpp | 2 src/compiler/glsl/opt_constant_propagation.cpp | 6 src/compiler/glsl/shader_cache.cpp | 176 +++ src/compiler/glsl/standalone.cpp | 2 src/compiler/glsl/string_to_uint_map.cpp | 42 src/compiler/glsl/string_to_uint_map.h | 177 +++ src/compiler/glsl/tests/set_uniform_initializer_tests.cpp | 2 src/compiler/nir/nir.c | 8 src/compiler/shader_info.h | 6 src/compiler/spirv/vtn_variables.c | 5 src/egl/drivers/dri2/egl_dri2.c | 12 src/egl/drivers/dri2/platform_wayland.c | 26 src/egl/drivers/dri2/platform_x11.c | 1 src/egl/generate/egl.xml | 626 +++++++++++++- src/egl/generate/eglFunctionList.py | 4 src/gallium/auxiliary/gallivm/lp_bld_format_soa.c | 8 src/gallium/auxiliary/gallivm/lp_bld_gather.c | 30 src/gallium/auxiliary/os/os_time.c | 9 src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 2 src/gallium/drivers/freedreno/freedreno_draw.c | 8 src/gallium/drivers/llvmpipe/lp_context.c | 6 src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 3 src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 4 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 7 src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c | 1 src/gallium/drivers/radeon/Android.mk | 2 src/gallium/drivers/radeon/r600_pipe_common.c | 1 src/gallium/drivers/radeon/r600_pipe_common.h | 5 src/gallium/drivers/radeon/r600_texture.c | 9 src/gallium/drivers/radeonsi/Android.mk | 2 src/gallium/drivers/radeonsi/si_compute.c | 5 src/gallium/drivers/radeonsi/si_descriptors.c | 85 + src/gallium/drivers/radeonsi/si_pipe.c | 24 src/gallium/drivers/radeonsi/si_pipe.h | 3 src/gallium/drivers/radeonsi/si_shader.c | 70 + src/gallium/drivers/radeonsi/si_shader.h | 5 src/gallium/drivers/radeonsi/si_state.c | 14 src/gallium/drivers/radeonsi/si_state_draw.c | 9 src/gallium/drivers/radeonsi/si_state_shaders.c | 17 src/gallium/drivers/swr/rasterizer/core/api.cpp | 2 src/gallium/drivers/swr/rasterizer/core/context.h | 8 src/gallium/drivers/swr/rasterizer/core/threads.cpp | 4 src/gallium/drivers/vc4/Android.mk | 4 src/gallium/drivers/vc4/Makefile.am | 8 src/gallium/drivers/vc4/Makefile.sources | 3 src/gallium/drivers/vc4/vc4_tiling.h | 17 src/gallium/state_trackers/wgl/stw_framebuffer.c | 7 src/glx/glxcmds.c | 2 src/intel/blorp/blorp_blit.c | 1 src/intel/genxml/gen10.xml | 4 src/intel/vulkan/anv_formats.c | 19 src/mesa/drivers/dri/i965/brw_blorp.c | 16 src/mesa/drivers/dri/i965/brw_bufmgr.c | 22 src/mesa/drivers/dri/i965/brw_clear.c | 14 src/mesa/drivers/dri/i965/brw_context.c | 8 src/mesa/drivers/dri/i965/brw_context.h | 2 src/mesa/drivers/dri/i965/brw_defines.h | 7 src/mesa/drivers/dri/i965/brw_gs_surface_state.c | 1 src/mesa/drivers/dri/i965/brw_state_upload.c | 10 src/mesa/drivers/dri/i965/brw_tcs_surface_state.c | 1 src/mesa/drivers/dri/i965/brw_tes_surface_state.c | 1 src/mesa/drivers/dri/i965/brw_vs_surface_state.c | 1 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 10 src/mesa/drivers/dri/i965/gen7_l3_state.c | 9 src/mesa/drivers/dri/i965/gen7_urb.c | 4 src/mesa/drivers/dri/i965/genX_blorp_exec.c | 3 src/mesa/drivers/dri/i965/intel_fbo.c | 5 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 93 -- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 40 src/mesa/drivers/dri/i965/intel_pixel_draw.c | 2 src/mesa/drivers/dri/i965/intel_tex.c | 6 src/mesa/drivers/dri/i965/intel_tex_image.c | 7 src/mesa/drivers/dri/i965/intel_tex_validate.c | 4 src/mesa/main/shader_query.cpp | 2 src/mesa/main/shaderobj.c | 2 src/mesa/main/teximage.c | 4 src/mesa/program/ir_to_mesa.cpp | 58 + src/mesa/state_tracker/st_cb_readpixels.c | 2 src/mesa/state_tracker/st_draw.c | 7 src/mesa/state_tracker/st_glsl_to_nir.cpp | 2 src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 src/mesa/state_tracker/st_manager.c | 2 src/mesa/vbo/vbo_exec_array.c | 4 src/mesa/vbo/vbo_minmax_index.c | 8 src/util/Makefile.am | 4 src/util/Makefile.sources | 2 src/util/string_to_uint_map.cpp | 42 src/util/string_to_uint_map.h | 177 --- src/util/strtod.c | 12 131 files changed, 2728 insertions(+), 868 deletions(-)
New commits: commit 6bdf054c076ce28ccc96583186a9fb09f6a9f08e Author: Timo Aaltonen <tjaal...@debian.org> Date: Mon Sep 18 14:44:09 2017 +0300 upload to artful diff --git a/debian/changelog b/debian/changelog index e12b38f..9dbc85d 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,9 @@ +mesa (17.2.1-0ubuntu1) artful; urgency=medium + + * New upstream bugfix release. (LP: #1716250) + + -- Timo Aaltonen <tjaal...@debian.org> Mon, 18 Sep 2017 14:42:16 +0300 + mesa (17.2.0-0ubuntu1) artful; urgency=medium * New upstream release. commit d6d2b6b5ec9b1638c0827582872670c7da79bb53 Author: Emil Velikov <emil.veli...@collabora.com> Date: Sun Sep 17 23:57:32 2017 +0100 docs: add release notes for 17.2.1 Signed-off-by: Emil Velikov <emil.veli...@collabora.com> diff --git a/docs/relnotes/17.2.1.html b/docs/relnotes/17.2.1.html new file mode 100644 index 0000000..b33315c --- /dev/null +++ b/docs/relnotes/17.2.1.html @@ -0,0 +1,199 @@ +<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> +<html lang="en"> +<head> + <meta http-equiv="content-type" content="text/html; charset=utf-8"> + <title>Mesa Release Notes</title> + <link rel="stylesheet" type="text/css" href="../mesa.css"> +</head> +<body> + +<div class="header"> + <h1>The Mesa 3D Graphics Library</h1> +</div> + +<iframe src="../contents.html"></iframe> +<div class="content"> + +<h1>Mesa 17.2.1 Release Notes / September 17, 2017</h1> + +<p> +Mesa 17.2.1 is a bug fix release which fixes bugs found since the 17.2.0 release. +</p> +<p> +Mesa 17.2.1 implements the OpenGL 4.5 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.5. OpenGL +4.5 is <strong>only</strong> available if requested at context creation +because compatibility contexts are not supported. +</p> + + +<h2>SHA256 checksums</h2> +<pre> +TBD +</pre> + + +<h2>New features</h2> +<p>None</p> + + +<h2>Bug fixes</h2> + +<ul> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100613">Bug 100613</a> - Regression in Mesa 17 on s390x (zSystems)</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101709">Bug 101709</a> - [llvmpipe] piglit gl-1.0-scissor-offscreen regression</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102454">Bug 102454</a> - glibc 2.26 doesn't provide anymore xlocale.h</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102467">Bug 102467</a> - src/mesa/state_tracker/st_cb_readpixels.c:178]: (warning) Redundant assignment</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102502">Bug 102502</a> - [bisected] Kodi crashes since commit 707d2e8b - gallium: fold u_trim_pipe_prim call from st/mesa to drivers</li> + +</ul> + + +<h2>Changes</h2> + +<p>Bas Nieuwenhuizen (4):</p> +<ul> + <li>radv: Actually set the cmd_buffer usage_flags.</li> + <li>radv: Fix vkCopyImage with both depth and stencil aspects.</li> + <li>radv: Disable multilayer & multilevel DCC.</li> + <li>radv: Don't allocate CMASK for linear images.</li> +</ul> + +<p>Ben Crocker (1):</p> +<ul> + <li>llvmpipe: lp_build_gather_elem_vec BE fix for 3x16 load</li> +</ul> + +<p>Brian Paul (1):</p> +<ul> + <li>llvmpipe: initialize llvmpipe->dirty with LP_NEW_SCISSOR</li> +</ul> + +<p>Charmaine Lee (1):</p> +<ul> + <li>vbo: fix offset in minmax cache key</li> +</ul> + +<p>Dave Airlie (12):</p> +<ul> + <li>radv: disable 1d/2d linear optimisation on gfx9.</li> + <li>radv/gfx9: set descriptor up for base_mip to level range.</li> + <li>Revert "radv: disable support for VEGA for now."</li> + <li>radv/winsys: use amdgpu_bo_va_op_raw.</li> + <li>radv/gfx9: allocate events from uncached VA space</li> + <li>radv: use simpler indirect packet 3 if possible.</li> + <li>radv: don't use iview for meta image width/height.</li> + <li>radv: handle GFX9 1D textures</li> + <li>radv/gfx9: set mip0-depth correctly for 2d arrays/3d images</li> + <li>radv/ac: bump params array for image atomic comp swap</li> + <li>radv/gfx9: fix image resource handling.</li> + <li>radv/winsys: fix flags vs va_flags thinko.</li> +</ul> + +<p>Emil Velikov (7):</p> +<ul> + <li>docs: add sha256 checksums for 17.2.0</li> + <li>cherry-ignore: add getCapability patches</li> + <li>cherry-ignore: ignore gfx9 tile swizzle fix</li> + <li>cherry-ignore: add execution_type() fix to the list</li> + <li>cherry-ignore: add EGL+gbm swast patches</li> + <li>egl/x11/dri3: adding missing __DRI_BACKGROUND_CALLABLE extension</li> + <li>Update version to 17.2.1</li> +</ul> + +<p>Eric Engestrom (3):</p> +<ul> + <li>util: improve compiler guard</li> + <li>mesa/st: remove unwanted backup file</li> + <li>docs/egl: remove reference to EGL_DRIVERS_PATH</li> +</ul> + +<p>Grazvydas Ignotas (1):</p> +<ul> + <li>radv: don't assert on empty hash table</li> +</ul> + +<p>Jason Ekstrand (2):</p> +<ul> + <li>anv/formats: Nicely handle unknown VkFormat enums</li> + <li>spirv: Add support for the HelperInvocation builtin</li> +</ul> + +<p>Karol Herbst (1):</p> +<ul> + <li>nvc0: write 0 to pipeline_statistics.cs_invocations</li> +</ul> + +<p>Kenneth Graunke (2):</p> +<ul> + <li>i965: Fix crash in fallback GTT mapping.</li> + <li>i965: Set "Subslice Hashing Mode" to 16x16 on Apollolake.</li> +</ul> + +<p>Marek Olšák (1):</p> +<ul> + <li>st/mesa: skip draw calls with pipe_draw_info::count == 0</li> +</ul> + +<p>Michael Olbrich (1):</p> +<ul> + <li>egl/dri2: only destroy created objects</li> +</ul> + +<p>Nicolai Hähnle (1):</p> +<ul> + <li>radeonsi: apply a mask to gl_SampleMaskIn in the PS prolog</li> +</ul> + +<p>Nicolai Hähnle (4):</p> +<ul> + <li>radeonsi/gfx9: always flush DB metadata on framebuffer changes</li> + <li>st/glsl_to_tgsi: only the first (inner-most) array reference can be a 2D index</li> + <li>ac/surface: match Z and stencil tile config</li> + <li>glsl: fix glsl_struct_field size calculations for shader cache</li> +</ul> + +<p>Ray Strode (1):</p> +<ul> + <li>gallivm: correct channel shift logic on big endian</li> +</ul> + +<p>Rob Clark (1):</p> +<ul> + <li>freedreno: skip batch-cache for compute shaders</li> +</ul> + +<p>Roland Scheidegger (1):</p> +<ul> + <li>st/mesa: fix view template initialization in try_pbo_readpixels</li> +</ul> + +<p>Samuel Pitoiset (1):</p> +<ul> + <li>radeonsi: update dirty_level_mask before dispatching</li> +</ul> + +<p>Timothy Arceri (9):</p> +<ul> + <li>glsl: allow NULL to be passed to encode_type_to_blob()</li> + <li>glsl: stop adding pointers from gl_shader_variable to the cache</li> + <li>glsl: stop adding pointers from glsl_struct_field to the cache</li> + <li>glsl: add has_uniform_storage() helper to shader cache</li> + <li>glsl: don't write uniform storage offset if there isn't one</li> + <li>glsl: always write a name/label string to the cache</li> + <li>compiler: move pointers to the start of shader_info</li> + <li>glsl: stop adding pointers from shader_info to the cache</li> + <li>glsl: stop adding pointers from bindless structs to the cache</li> +</ul> + + +</div> +</body> +</html> commit cb778d563fbfa2e244a56a441be07b85e2ade7e6 Author: Emil Velikov <emil.veli...@collabora.com> Date: Sun Sep 17 23:53:08 2017 +0100 Update version to 17.2.1 Signed-off-by: Emil Velikov <emil.veli...@collabora.com> diff --git a/VERSION b/VERSION index 290a3f3..7c95a07 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -17.2.0 +17.2.1 commit 7c3bd519e70c4497079437330430a8c486991158 Author: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> Date: Mon Aug 28 00:18:44 2017 +0200 radv: Don't allocate CMASK for linear images. We can't use it anyway in fast clears, and on GFX9 it seems to actually hange the card if we specify it. Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" (cherry picked from commit 1a172fb113554fa03053052b161d5e22fc2fcb1f) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index cd7ed55..6cc4540 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -838,8 +838,10 @@ radv_image_create(VkDevice _device, if ((pCreateInfo->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) && pCreateInfo->mipLevels == 1 && - !image->surface.dcc_size && image->info.depth == 1 && can_cmask_dcc) + !image->surface.dcc_size && image->info.depth == 1 && can_cmask_dcc && + !image->surface.is_linear) radv_image_alloc_cmask(device, image); + if (image->info.samples > 1 && vk_format_is_color(pCreateInfo->format)) { radv_image_alloc_fmask(device, image); } else if (vk_format_is_depth(pCreateInfo->format)) { commit c6b3732967bc886430a6c00c353b0bba90dd117b Author: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> Date: Wed Aug 30 00:58:03 2017 +0200 radv: Disable multilayer & multilevel DCC. The current DCC init routine doesn't account for initializing a single layer or level. Multilayer seems hard for small textures on pre-GFX9 as tre metadata for the layers can be interleaved. For GFX9 multilevel textures are a problem for similar reasons. So just disable this for now, until we handle the texture modes correctly. Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" (cherry picked from commit bee83b26611c0a4a554aa37c59187351242e82fd) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index f113c96..cd7ed55 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -120,6 +120,7 @@ radv_init_surface(struct radv_device *device, VK_IMAGE_USAGE_STORAGE_BIT)) || (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) || (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) || + pCreateInfo->mipLevels > 1 || pCreateInfo->arrayLayers > 1 || device->physical_device->rad_info.chip_class < VI || create_info->scanout || (device->debug_flags & RADV_DEBUG_NO_DCC) || !radv_is_colorbuffer_format_supported(pCreateInfo->format, &blendable)) commit e012ade1cfa6df420d60502b1acee557b3df7617 Author: Eric Engestrom <eric.engest...@imgtec.com> Date: Tue Sep 12 15:35:54 2017 +0100 docs/egl: remove reference to EGL_DRIVERS_PATH Support for external egl drivers was dropped a few years ago. Fixes: 209360bbb91bb10346eb "egl/main: drop support for external egl drivers" Signed-off-by: Eric Engestrom <eric.engest...@imgtec.com> Reviewed-by: Emil Velikov <emil.veli...@collabora.com> (cherry picked from commit 85b66d20969685c26d3f7d22b6fc7b988872fa88) diff --git a/docs/egl.html b/docs/egl.html index f072ce1..e752a70 100644 --- a/docs/egl.html +++ b/docs/egl.html @@ -130,27 +130,6 @@ mesa/demos repository.</p> runtime</p> <dl> -<dt><code>EGL_DRIVERS_PATH</code></dt> -<dd> - -<p>By default, the main library will look for drivers in the directory where -the drivers are installed to. This variable specifies a list of -colon-separated directories where the main library will look for drivers, in -addition to the default directory. This variable is ignored for setuid/setgid -binaries.</p> - -<p>This variable is usually set to test an uninstalled build. For example, one -may set</p> - -<pre> - $ export LD_LIBRARY_PATH=$mesa/lib - $ export EGL_DRIVERS_PATH=$mesa/lib/egl -</pre> - -<p>to test a build without installation</p> - -</dd> - <dt><code>EGL_DRIVER</code></dt> <dd> commit 41e691d60518791d6676f526858b37a9f31c08d8 Author: Dave Airlie <airl...@redhat.com> Date: Fri Sep 8 12:30:23 2017 +1000 radv/winsys: fix flags vs va_flags thinko. Fixes: e8d57802f (radv/gfx9: allocate events from uncached VA space) Signed-off-by: Dave Airlie <airl...@redhat.com> (cherry picked from commit a5add6fb30e24c4e0177a98758888682d7e6ea36) diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c index 325f875..1c56c55 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c @@ -344,7 +344,7 @@ radv_amdgpu_winsys_bo_create(struct radeon_winsys *_ws, uint32_t va_flags = 0; if (flags & RADEON_FLAG_VA_UNCACHED) va_flags |= AMDGPU_VM_MTYPE_UC; - r = radv_amdgpu_bo_va_op(ws->dev, buf_handle, 0, size, va, flags, AMDGPU_VA_OP_MAP); + r = radv_amdgpu_bo_va_op(ws->dev, buf_handle, 0, size, va, va_flags, AMDGPU_VA_OP_MAP); if (r) goto error_va_map; commit b6ae4400fc520736b0810f723ff4b5efba9ad004 Author: Emil Velikov <emil.veli...@collabora.com> Date: Thu Aug 3 19:29:27 2017 +0100 egl/x11/dri3: adding missing __DRI_BACKGROUND_CALLABLE extension Fixes: 3b7b6adf3ac ("egl: Implement __DRI_BACKGROUND_CALLABLE") Cc: Timothy Arceri <tarc...@itsqueeze.com> Signed-off-by: Emil Velikov <emil.veli...@collabora.com> Reviewed-by: Marek Olšák <marek.ol...@amd.com> (cherry picked from commit f24bc1816242895d0bc0711a50bd2dfd3cb8b21a) diff --git a/src/egl/drivers/dri2/platform_x11.c b/src/egl/drivers/dri2/platform_x11.c index d6199c8..2db8153 100644 --- a/src/egl/drivers/dri2/platform_x11.c +++ b/src/egl/drivers/dri2/platform_x11.c @@ -1319,6 +1319,7 @@ static const __DRIextension *dri3_image_loader_extensions[] = { &dri3_image_loader_extension.base, &image_lookup_extension.base, &use_invalidate.base, + &background_callable_extension.base, NULL, }; commit c47914276eab768fe40021b4459630a372f3becb Author: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> Date: Wed Sep 6 00:28:22 2017 +0200 radv: Fix vkCopyImage with both depth and stencil aspects. Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Dave Airlie <airl...@redhat.com> (cherry picked from commit ff23e03d60d264a64fce340c132404c6070050a0) diff --git a/src/amd/vulkan/radv_meta_blit2d.c b/src/amd/vulkan/radv_meta_blit2d.c index 79e76be..724a88f 100644 --- a/src/amd/vulkan/radv_meta_blit2d.c +++ b/src/amd/vulkan/radv_meta_blit2d.c @@ -53,7 +53,8 @@ enum blit2d_src_type { static void create_iview(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_surf *surf, - struct radv_image_view *iview, VkFormat depth_format) + struct radv_image_view *iview, VkFormat depth_format, + VkImageAspectFlagBits aspects) { VkFormat format; @@ -69,7 +70,7 @@ create_iview(struct radv_cmd_buffer *cmd_buffer, .viewType = VK_IMAGE_VIEW_TYPE_2D, .format = format, .subresourceRange = { - .aspectMask = surf->aspect_mask, + .aspectMask = aspects, .baseMipLevel = surf->level, .levelCount = 1, .baseArrayLayer = surf->layer, @@ -111,7 +112,8 @@ blit2d_bind_src(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_surf *src_img, struct radv_meta_blit2d_buffer *src_buf, struct blit2d_src_temps *tmp, - enum blit2d_src_type src_type, VkFormat depth_format) + enum blit2d_src_type src_type, VkFormat depth_format, + VkImageAspectFlagBits aspects) { struct radv_device *device = cmd_buffer->device; @@ -138,7 +140,7 @@ blit2d_bind_src(struct radv_cmd_buffer *cmd_buffer, VK_SHADER_STAGE_FRAGMENT_BIT, 16, 4, &src_buf->pitch); } else { - create_iview(cmd_buffer, src_img, &tmp->iview, depth_format); + create_iview(cmd_buffer, src_img, &tmp->iview, depth_format, aspects); radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, device->meta_state.blit2d.p_layouts[src_type], @@ -175,9 +177,10 @@ blit2d_bind_dst(struct radv_cmd_buffer *cmd_buffer, uint32_t width, uint32_t height, VkFormat depth_format, - struct blit2d_dst_temps *tmp) + struct blit2d_dst_temps *tmp, + VkImageAspectFlagBits aspects) { - create_iview(cmd_buffer, dst, &tmp->iview, depth_format); + create_iview(cmd_buffer, dst, &tmp->iview, depth_format, aspects); radv_CreateFramebuffer(radv_device_to_handle(cmd_buffer->device), &(VkFramebufferCreateInfo) { @@ -250,106 +253,111 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer, struct radv_device *device = cmd_buffer->device; for (unsigned r = 0; r < num_rects; ++r) { - VkFormat depth_format = 0; - if (dst->aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) - depth_format = vk_format_stencil_only(dst->image->vk_format); - else if (dst->aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) - depth_format = vk_format_depth_only(dst->image->vk_format); - struct blit2d_src_temps src_temps; - blit2d_bind_src(cmd_buffer, src_img, src_buf, &src_temps, src_type, depth_format); - - struct blit2d_dst_temps dst_temps; - blit2d_bind_dst(cmd_buffer, dst, rects[r].dst_x + rects[r].width, - rects[r].dst_y + rects[r].height, depth_format, &dst_temps); - - float vertex_push_constants[4] = { - rects[r].src_x, - rects[r].src_y, - rects[r].src_x + rects[r].width, - rects[r].src_y + rects[r].height, - }; + unsigned i; + for_each_bit(i, dst->aspect_mask) { + unsigned aspect_mask = 1u << i; + VkFormat depth_format = 0; + if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) + depth_format = vk_format_stencil_only(dst->image->vk_format); + else if (aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) + depth_format = vk_format_depth_only(dst->image->vk_format); + struct blit2d_src_temps src_temps; + blit2d_bind_src(cmd_buffer, src_img, src_buf, &src_temps, src_type, depth_format, aspect_mask); + + struct blit2d_dst_temps dst_temps; + blit2d_bind_dst(cmd_buffer, dst, rects[r].dst_x + rects[r].width, + rects[r].dst_y + rects[r].height, depth_format, &dst_temps, aspect_mask); + + float vertex_push_constants[4] = { + rects[r].src_x, + rects[r].src_y, + rects[r].src_x + rects[r].width, + rects[r].src_y + rects[r].height, + }; + + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.blit2d.p_layouts[src_type], + VK_SHADER_STAGE_VERTEX_BIT, 0, 16, + vertex_push_constants); + + if (aspect_mask == VK_IMAGE_ASPECT_COLOR_BIT) { + unsigned fs_key = radv_format_meta_fs_key(dst_temps.iview.vk_format); + + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.blit2d.render_passes[fs_key], + .framebuffer = dst_temps.fb, + .renderArea = { + .offset = { rects[r].dst_x, rects[r].dst_y, }, + .extent = { rects[r].width, rects[r].height }, + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, VK_SUBPASS_CONTENTS_INLINE); + + + bind_pipeline(cmd_buffer, src_type, fs_key); + } else if (aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) { + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.blit2d.depth_only_rp, + .framebuffer = dst_temps.fb, + .renderArea = { + .offset = { rects[r].dst_x, rects[r].dst_y, }, + .extent = { rects[r].width, rects[r].height }, + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, VK_SUBPASS_CONTENTS_INLINE); + + + bind_depth_pipeline(cmd_buffer, src_type); + + } else if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) { + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.blit2d.stencil_only_rp, + .framebuffer = dst_temps.fb, + .renderArea = { + .offset = { rects[r].dst_x, rects[r].dst_y, }, + .extent = { rects[r].width, rects[r].height }, + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, VK_SUBPASS_CONTENTS_INLINE); - radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), - device->meta_state.blit2d.p_layouts[src_type], - VK_SHADER_STAGE_VERTEX_BIT, 0, 16, - vertex_push_constants); - - if (dst->aspect_mask == VK_IMAGE_ASPECT_COLOR_BIT) { - unsigned fs_key = radv_format_meta_fs_key(dst_temps.iview.vk_format); - - radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), - &(VkRenderPassBeginInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit2d.render_passes[fs_key], - .framebuffer = dst_temps.fb, - .renderArea = { - .offset = { rects[r].dst_x, rects[r].dst_y, }, - .extent = { rects[r].width, rects[r].height }, - }, - .clearValueCount = 0, - .pClearValues = NULL, - }, VK_SUBPASS_CONTENTS_INLINE); - - - bind_pipeline(cmd_buffer, src_type, fs_key); - } else if (dst->aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) { - radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), - &(VkRenderPassBeginInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit2d.depth_only_rp, - .framebuffer = dst_temps.fb, - .renderArea = { - .offset = { rects[r].dst_x, rects[r].dst_y, }, - .extent = { rects[r].width, rects[r].height }, - }, - .clearValueCount = 0, - .pClearValues = NULL, - }, VK_SUBPASS_CONTENTS_INLINE); - - - bind_depth_pipeline(cmd_buffer, src_type); - - } else if (dst->aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) { - radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), - &(VkRenderPassBeginInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit2d.stencil_only_rp, - .framebuffer = dst_temps.fb, - .renderArea = { - .offset = { rects[r].dst_x, rects[r].dst_y, }, - .extent = { rects[r].width, rects[r].height }, - }, - .clearValueCount = 0, - .pClearValues = NULL, - }, VK_SUBPASS_CONTENTS_INLINE); - - - bind_stencil_pipeline(cmd_buffer, src_type); - } - radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) { - .x = rects[r].dst_x, - .y = rects[r].dst_y, - .width = rects[r].width, - .height = rects[r].height, - .minDepth = 0.0f, - .maxDepth = 1.0f - }); + bind_stencil_pipeline(cmd_buffer, src_type); + } else + unreachable("Processing blit2d with multiple aspects."); - radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkRect2D) { - .offset = (VkOffset2D) { rects[r].dst_x, rects[r].dst_y }, - .extent = (VkExtent2D) { rects[r].width, rects[r].height }, - }); + radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) { + .x = rects[r].dst_x, + .y = rects[r].dst_y, + .width = rects[r].width, + .height = rects[r].height, + .minDepth = 0.0f, + .maxDepth = 1.0f + }); + radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkRect2D) { + .offset = (VkOffset2D) { rects[r].dst_x, rects[r].dst_y }, + .extent = (VkExtent2D) { rects[r].width, rects[r].height }, + }); - radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); - radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer)); - /* At the point where we emit the draw call, all data from the - * descriptor sets, etc. has been used. We are free to delete it. - */ - blit2d_unbind_dst(cmd_buffer, &dst_temps); + radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); + radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer)); + + /* At the point where we emit the draw call, all data from the + * descriptor sets, etc. has been used. We are free to delete it. + */ + blit2d_unbind_dst(cmd_buffer, &dst_temps); + } } } commit 536f852d42184217e80b879a50b5450827eeed34 Author: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> Date: Sun Sep 3 23:35:37 2017 +0200 radv: Actually set the cmd_buffer usage_flags. Otherwise, the simultaneous uage bit doesn't get set from the begin info, which we need for batchchaining. Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Dave Airlie <airl...@redhat.com> (cherry picked from commit dec7b38fe62a1db46c5150a7368d3bb3c5e45305) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 645b48f..9ca58fd 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1984,6 +1984,7 @@ VkResult radv_BeginCommandBuffer( memset(&cmd_buffer->state, 0, sizeof(cmd_buffer->state)); cmd_buffer->state.last_primitive_reset_en = -1; + cmd_buffer->usage_flags = pBeginInfo->flags; /* setup initial configuration into command buffer */ if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) { commit fdc4f6e6849e40d891347483c00acdd64c9e0f84 Author: Grazvydas Ignotas <nota...@gmail.com> Date: Mon Aug 28 00:29:36 2017 +0300 radv: don't assert on empty hash table Currently if table_size is 0, it's falling through to: unreachable("hash table should never be full"); But table_size can be 0 when RADV_DEBUG=nocache is set, or when the table allocation fails (which is not considered an error). Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Signed-off-by: Grazvydas Ignotas <nota...@gmail.com> Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> (cherry picked from commit b8dd69e1b49a5c4c5c82e34f804a97f7448ff6c3) diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c index e57c99b..9a82426 100644 --- a/src/amd/vulkan/radv_pipeline_cache.c +++ b/src/amd/vulkan/radv_pipeline_cache.c @@ -118,6 +118,9 @@ radv_pipeline_cache_search_unlocked(struct radv_pipeline_cache *cache, const uint32_t mask = cache->table_size - 1; const uint32_t start = (*(uint32_t *) sha1); + if (cache->table_size == 0) + return NULL; + for (uint32_t i = 0; i < cache->table_size; i++) { const uint32_t index = (start + i) & mask; struct cache_entry *entry = cache->hash_table[index]; commit 8cf9e5ab56f67ffc5698923a2e163ee3618afff0 Author: Eric Engestrom <e...@engestrom.ch> Date: Wed Aug 30 14:10:06 2017 +0100 mesa/st: remove unwanted backup file Fixes: 0ac78dc92582a59d4319 "util: move string_to_uint_map to glsl" Cc: Emil Velikov <emil.veli...@collabora.com> Signed-off-by: Eric Engestrom <e...@engestrom.ch> Reviewed-by: Emil Velikov <emil.veli...@collabora.com> (cherry picked from commit ac0d8dc3fa3b294104d0c8ba54262e7b07389cb9) diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp.orig b/src/mesa/state_tracker/st_glsl_to_nir.cpp.orig deleted file mode 100644 index 38d6c70..0000000 --- a/src/mesa/state_tracker/st_glsl_to_nir.cpp.orig +++ /dev/null @@ -1,479 +0,0 @@ -/* - * Copyright © 2015 Red Hat - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include "st_nir.h" - -#include "pipe/p_defines.h" -#include "pipe/p_screen.h" -#include "pipe/p_context.h" - -#include "program/program.h" -#include "program/prog_statevars.h" -#include "program/prog_parameter.h" -#include "program/ir_to_mesa.h" -#include "main/mtypes.h" -#include "main/errors.h" -#include "main/shaderapi.h" -#include "main/uniforms.h" -#include "util/string_to_uint_map.h" - -#include "st_context.h" -#include "st_program.h" - -#include "compiler/nir/nir.h" -#include "compiler/glsl_types.h" -#include "compiler/glsl/glsl_to_nir.h" -#include "compiler/glsl/ir.h" - - -static int -type_size(const struct glsl_type *type) -{ - return type->count_attribute_slots(false); -} - -/* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we - * may need to fix up varying slots so the glsl->nir path is aligned - * with the anything->tgsi->nir path. - */ -static void -st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list) -{ - if (st->needs_texcoord_semantic) - return; - - nir_foreach_variable(var, var_list) { - if (var->data.location >= VARYING_SLOT_VAR0) { - var->data.location += 9; - } else if ((var->data.location >= VARYING_SLOT_TEX0) && - (var->data.location <= VARYING_SLOT_TEX7)) { - var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0; - } - } -} - -/* input location assignment for VS inputs must be handled specially, so - * that it is aligned w/ st's vbo state. - * (This isn't the case with, for ex, FS inputs, which only need to agree - * on varying-slot w/ the VS outputs) - */ -static void -st_nir_assign_vs_in_locations(struct gl_program *prog, nir_shader *nir) -{ - unsigned attr, num_inputs = 0; - unsigned input_to_index[VERT_ATTRIB_MAX] = {0}; - - /* TODO de-duplicate w/ similar code in st_translate_vertex_program()? */ - for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) { - if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) != 0) { - input_to_index[attr] = num_inputs; - num_inputs++; - if ((prog->info.double_inputs_read & BITFIELD64_BIT(attr)) != 0) { - /* add placeholder for second part of a double attribute */ - num_inputs++; - } - } else { - input_to_index[attr] = ~0; - } - } - - /* bit of a hack, mirroring st_translate_vertex_program */ - input_to_index[VERT_ATTRIB_EDGEFLAG] = num_inputs; - - nir->num_inputs = 0; - nir_foreach_variable_safe(var, &nir->inputs) { - attr = var->data.location; - assert(attr < ARRAY_SIZE(input_to_index)); - - if (input_to_index[attr] != ~0u) { - var->data.driver_location = input_to_index[attr]; - nir->num_inputs++; - } else { - /* Move unused input variables to the globals list (with no - * initialization), to avoid confusing drivers looking through the