Hi,
On keskiviikko 16 heinäkuu 2014, Thorsten Glaser wrote:
> On Wed, 16 Jul 2014, John Paul Adrian Glaubitz wrote:
> > Absolutely. Could the upstream Mesa developers maybe apply the patch
> > as well?
>
> They are not taking us for real, see #728053 for their feedback…
While effect of unaligned accesses is normally invisible,
that's not always the case, even on non-m68k platforms.
It's bad/sloppy coding, because:
- There's other (newer) HW besides m68k which has alignment
requirements [1]. On ARM that can be even configured, both
at CPU and (Linux) kernel level. Even on Intel e.g. atomic
accesses need be aligned
- even if HW supports unaligned accesses, it's newer faster
nor safer than aligned, and in some cases it can be a lot
slower [2] (extreme case is when each access causes interrupt)
- if gcc happens to add padding [3] for (non-packed) unaligned
structure members to align them (because HW requires it or
because it's faster), those structures use more memory than
structures where their members are at their natural alignment
- If that causes data not to fit cache, for a frequently
used structure(s), that's also slower
- Eero
[1] Hasn't anybody else had issues with this on some other
architecture?
[2] http://stackoverflow.com/questions/12491578/whats-the-actual-effect-of-
successful-unaligned-accesses-on-x86
[3] "pahole" tool from "dwarves" package can be used to inspect
how hole-ridden structures in binaries (with debug data) are.
Valgrind DHAT tool can be used to inspect how much those
structure members get accesses:
http://valgrind.org/docs/manual/dh-manual.html
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