configure.ac | 180
man/ati.man | 2
man/radeon.man | 579 ---
src/AtomBios/CD_Operations.c | 983 -----
src/AtomBios/Decoder.c | 258 -
src/AtomBios/hwserv_drv.c | 354 -
src/AtomBios/includes/CD_Common_Types.h | 172
src/AtomBios/includes/CD_Definitions.h | 50
src/AtomBios/includes/CD_Opcodes.h | 181
src/AtomBios/includes/CD_Structs.h | 486 --
src/AtomBios/includes/CD_binding.h | 46
src/AtomBios/includes/CD_hw_services.h | 318 -
src/AtomBios/includes/Decoder.h | 107
src/AtomBios/includes/ObjectID.h | 643 ---
src/AtomBios/includes/atombios.h | 6137 --------------------------------
src/AtomBios/includes/regsdef.h | 25
src/Makefile.am | 104
src/ati.c | 1
src/ati.h | 1
src/ati_pciids_gen.h | 161
src/atipciids.h | 1
src/atombios_crtc.c | 1537 --------
src/atombios_output.c | 2747 --------------
src/cayman_accel.c | 304 +
src/cayman_reg.h | 235 +
src/cayman_reg_auto.h | 4351 ++++++++++++++++++++++
src/cayman_shader.c | 3131 ++++++++++++++++
src/cayman_shader.h | 279 +
src/compat-api.h | 94
src/drmmode_display.c | 616 ++-
src/drmmode_display.h | 29
src/evergreen_accel.c | 1483 +++++++
src/evergreen_exa.c | 1977 ++++++++++
src/evergreen_reg.h | 250 +
src/evergreen_reg_auto.h | 4039 +++++++++++++++++++++
src/evergreen_shader.c | 3130 ++++++++++++++++
src/evergreen_shader.h | 292 +
src/evergreen_state.h | 354 +
src/evergreen_textured_videofuncs.c | 525 ++
src/generic_bus.h | 36
src/legacy_crtc.c | 1898 ---------
src/legacy_output.c | 2102 ----------
src/pcidb/ati_pciids.csv | 163
src/pcidb/parse_pci_ids.pl | 4
src/r600_exa.c | 1326 ++----
src/r600_reg.h | 56
src/r600_shader.c | 860 +++-
src/r600_shader.h | 84
src/r600_state.h | 141
src/r600_textured_videofuncs.c | 194 -
src/r6xx_accel.c | 860 ++--
src/radeon.h | 1360 +------
src/radeon_accel.c | 2019 ++++------
src/radeon_accelfuncs.c | 1385 -------
src/radeon_atombios.c | 3020 ---------------
src/radeon_atombios.h | 292 -
src/radeon_atomwrapper.c | 102
src/radeon_atomwrapper.h | 31
src/radeon_bios.c | 2053 ----------
src/radeon_bo_helper.c | 177
src/radeon_bo_helper.h | 31
src/radeon_chipinfo_gen.h | 161
src/radeon_chipset_gen.h | 165
src/radeon_commonfuncs.c | 1032 -----
src/radeon_crtc.c | 1117 -----
src/radeon_cursor.c | 452 --
src/radeon_dri.c | 2333 ------------
src/radeon_dri.h | 91
src/radeon_dri2.c | 933 +++-
src/radeon_dri2.h | 48
src/radeon_driver.c | 5966 -------------------------------
src/radeon_drm.h | 23
src/radeon_dummy_bufmgr.h | 62
src/radeon_exa.c | 483 --
src/radeon_exa_funcs.c | 554 --
src/radeon_exa_render.c | 949 ++--
src/radeon_exa_shared.c | 106
src/radeon_exa_shared.h | 6
src/radeon_glamor.c | 350 +
src/radeon_glamor.h | 98
src/radeon_glamor_wrappers.c | 1870 +++++++++
src/radeon_glamor_wrappers.h | 179
src/radeon_kms.c | 751 ++-
src/radeon_legacy_memory.c | 140
src/radeon_macros.h | 209 -
src/radeon_mm_i2c.c | 642 ---
src/radeon_modes.c | 542 --
src/radeon_output.c | 3115 ----------------
src/radeon_pci_chipset_gen.h | 163
src/radeon_pci_device_match_gen.h | 161
src/radeon_pm.c | 886 ----
src/radeon_probe.c | 44
src/radeon_probe.h | 694 ---
src/radeon_reg.h | 7
src/radeon_render.c | 1060 -----
src/radeon_textured_video.c | 439 +-
src/radeon_textured_videofuncs.c | 1891 ++++-----
src/radeon_tv.c | 1283 ------
src/radeon_tv.h | 62
src/radeon_vbo.c | 70
src/radeon_vbo.h | 54
src/radeon_version.h | 1
src/radeon_video.c | 3838 --------------------
src/radeon_video.h | 90
src/radeon_vip.c | 362 -
src/radeon_xvmc.c | 145
src/theatre.c | 2211 -----------
src/theatre.h | 71
src/theatre200.c | 2275 -----------
src/theatre200.h | 140
src/theatre200_module.c | 33
src/theatre_detect.c | 130
src/theatre_detect.h | 46
src/theatre_detect_module.c | 37
src/theatre_module.c | 33
src/theatre_reg.h | 876 ----
116 files changed, 31170 insertions(+), 62665 deletions(-)
New commits:
commit 6ef1ad6a46348d3aecd8d1f5e94431ca2298853c
Author: Michel Dänzer <michel.daen...@amd.com>
Date: Fri Jul 13 11:15:25 2012 +0200
Deal more gracefully with DRI2 being unavailable at build or run time.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
index e16d551..92241c7 100644
--- a/src/radeon_dri2.c
+++ b/src/radeon_dri2.c
@@ -29,13 +29,16 @@
#include "config.h"
#endif
+#include "radeon.h"
+#include "radeon_dri2.h"
+
+#ifdef DRI2
+
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <errno.h>
-#include "radeon.h"
-#include "radeon_dri2.h"
#include "radeon_version.h"
#if HAVE_LIST_H
@@ -1398,6 +1401,9 @@ radeon_dri2_screen_init(ScreenPtr pScreen)
Bool scheduling_works = TRUE;
#endif
+ if (!info->dri2.available)
+ return FALSE;
+
info->dri2.device_name = drmGetDeviceNameFromFd(info->dri2.drm_fd);
if ( (info->ChipFamily >= CHIP_FAMILY_TAHITI) ) {
@@ -1502,3 +1508,5 @@ void radeon_dri2_close_screen(ScreenPtr pScreen)
drmFree(info->dri2.device_name);
}
+#endif /* DRI2 */
+
diff --git a/src/radeon_dri2.h b/src/radeon_dri2.h
index 0dd2a33..aaad0ca 100644
--- a/src/radeon_dri2.h
+++ b/src/radeon_dri2.h
@@ -27,13 +27,18 @@
#ifndef RADEON_DRI2_H
#define RADEON_DRI2_H
+#include <xorg-server.h>
+
struct radeon_dri2 {
drmVersionPtr pKernelDRMVersion;
int drm_fd;
+ Bool available;
Bool enabled;
char *device_name;
};
+#ifdef DRI2
+
#include "dri2.h"
Bool radeon_dri2_screen_init(ScreenPtr pScreen);
void radeon_dri2_close_screen(ScreenPtr pScreen);
@@ -46,4 +51,42 @@ void radeon_dri2_frame_event_handler(unsigned int frame,
unsigned int tv_sec,
void radeon_dri2_flip_event_handler(unsigned int frame, unsigned int tv_sec,
unsigned int tv_usec, void *event_data);
+#else
+
+static inline Bool radeon_dri2_screen_init(ScreenPtr pScreen) { return FALSE; }
+static inline void radeon_dri2_close_screen(ScreenPtr pScreen) {}
+
+static inline void
+radeon_dri2_dummy_event_handler(unsigned int frame, unsigned int tv_sec,
+ unsigned int tv_usec, void *event_data,
+ const char *name)
+{
+ static Bool warned;
+
+ if (!warned) {
+ ErrorF("%s called but DRI2 disabled at build time\n", name);
+ warned = TRUE;
+ }
+
+ free(event_data);
+}
+
+static inline void
+radeon_dri2_frame_event_handler(unsigned int frame, unsigned int tv_sec,
+ unsigned int tv_usec, void *event_data)
+{
+ radeon_dri2_dummy_event_handler(frame, tv_sec, tv_usec, event_data,
+ __func__);
+}
+
+static inline void
+radeon_dri2_flip_event_handler(unsigned int frame, unsigned int tv_sec,
+ unsigned int tv_usec, void *event_data)
+{
+ radeon_dri2_dummy_event_handler(frame, tv_sec, tv_usec, event_data,
+ __func__);
+}
+
#endif
+
+#endif /* RADEON_DRI2_H */
diff --git a/src/radeon_glamor.c b/src/radeon_glamor.c
index 714dde9..12dfd38 100644
--- a/src/radeon_glamor.c
+++ b/src/radeon_glamor.c
@@ -83,6 +83,9 @@ radeon_glamor_pre_init(ScrnInfoPtr scrn)
CARD32 version;
const char *s;
+ if (!info->dri2.available)
+ return FALSE;
+
s = xf86GetOptValString(info->Options, OPTION_ACCELMETHOD);
if (s == NULL)
return FALSE;
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 5cc362f..a4f46d7 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -425,6 +425,10 @@ shadowfb:
return TRUE;
}
+#ifdef DRI2
+ info->dri2.available = !!xf86LoadSubModule(pScrn, "dri2");
+#endif
+
if (radeon_glamor_pre_init(pScrn))
return TRUE;
@@ -740,6 +744,7 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
goto fail;
}
+ info->dri2.available = FALSE;
info->dri2.enabled = FALSE;
info->dri2.pKernelDRMVersion = drmGetVersion(info->dri2.drm_fd);
if (info->dri2.pKernelDRMVersion == NULL) {
commit ef8a404391036d8aa814dbda2407c789b8a64b92
Author: Michel Dänzer <michel.daen...@amd.com>
Date: Thu Jul 5 20:14:48 2012 +0200
Initial SI support.
Defaults to shadowfb. 3D acceleration is available with glamor. 2D
acceleration is disabled until the radeonsi driver can handle glamor's
shaders.
v2: add chip flags (Alex Deucher)
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
diff --git a/man/radeon.man b/man/radeon.man
index be50314..de1f6ec 100644
--- a/man/radeon.man
+++ b/man/radeon.man
@@ -180,6 +180,12 @@ Radeon HD 6430/6450/6470/6490
Radeon HD 6950/6970/6990
.TP 12
.B ARUBA
+.TP 12
+.B TAHITI
+.TP 12
+.B PITCAIRN
+.TP 12
+.B VERDE
.PD
.SH CONFIGURATION DETAILS
Please refer to __xconfigfile__(__filemansuffix__) for general configuration
diff --git a/src/Makefile.am b/src/Makefile.am
index da94927..3ee292a 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -68,6 +68,7 @@ if GLAMOR
AM_CFLAGS += @LIBGLAMOR_CFLAGS@
radeon_drv_la_LIBADD += @LIBGLAMOR_LIBS@
radeon_drv_la_SOURCES += \
+ radeon_glamor_wrappers.c \
radeon_glamor.c
endif
@@ -96,6 +97,7 @@ EXTRA_DIST = \
radeon_exa_funcs.c \
radeon_exa_shared.h \
radeon_glamor.h \
+ radeon_glamor_wrappers.h \
radeon.h \
radeon_probe.h \
radeon_reg.h \
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
index b08ad88..5509120 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -617,3 +617,42 @@
#define PCI_CHIP_ARUBA_99A0 0x99A0
#define PCI_CHIP_ARUBA_99A2 0x99A2
#define PCI_CHIP_ARUBA_99A4 0x99A4
+#define PCI_CHIP_TAHITI_6780 0x6780
+#define PCI_CHIP_TAHITI_6784 0x6784
+#define PCI_CHIP_TAHITI_6788 0x6788
+#define PCI_CHIP_TAHITI_678A 0x678A
+#define PCI_CHIP_TAHITI_6790 0x6790
+#define PCI_CHIP_TAHITI_6798 0x6798
+#define PCI_CHIP_TAHITI_6799 0x6799
+#define PCI_CHIP_TAHITI_679A 0x679A
+#define PCI_CHIP_TAHITI_679E 0x679E
+#define PCI_CHIP_TAHITI_679F 0x679F
+#define PCI_CHIP_PITCAIRN_6800 0x6800
+#define PCI_CHIP_PITCAIRN_6801 0x6801
+#define PCI_CHIP_PITCAIRN_6802 0x6802
+#define PCI_CHIP_PITCAIRN_6808 0x6808
+#define PCI_CHIP_PITCAIRN_6809 0x6809
+#define PCI_CHIP_PITCAIRN_6810 0x6810
+#define PCI_CHIP_PITCAIRN_6818 0x6818
+#define PCI_CHIP_PITCAIRN_6819 0x6819
+#define PCI_CHIP_PITCAIRN_684C 0x684C
+#define PCI_CHIP_VERDE_6820 0x6820
+#define PCI_CHIP_VERDE_6821 0x6821
+#define PCI_CHIP_VERDE_6823 0x6823
+#define PCI_CHIP_VERDE_6824 0x6824
+#define PCI_CHIP_VERDE_6825 0x6825
+#define PCI_CHIP_VERDE_6826 0x6826
+#define PCI_CHIP_VERDE_6827 0x6827
+#define PCI_CHIP_VERDE_6828 0x6828
+#define PCI_CHIP_VERDE_6829 0x6829
+#define PCI_CHIP_VERDE_682B 0x682B
+#define PCI_CHIP_VERDE_682D 0x682D
+#define PCI_CHIP_VERDE_682F 0x682F
+#define PCI_CHIP_VERDE_6830 0x6830
+#define PCI_CHIP_VERDE_6831 0x6831
+#define PCI_CHIP_VERDE_6837 0x6837
+#define PCI_CHIP_VERDE_6838 0x6838
+#define PCI_CHIP_VERDE_6839 0x6839
+#define PCI_CHIP_VERDE_683B 0x683B
+#define PCI_CHIP_VERDE_683D 0x683D
+#define PCI_CHIP_VERDE_683F 0x683F
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index 501a0f6..29ff26b 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -618,3 +618,42 @@
"0x99A0","ARUBA_99A0","ARUBA",1,,,,,"ARUBA"
"0x99A2","ARUBA_99A2","ARUBA",1,,,,,"ARUBA"
"0x99A4","ARUBA_99A4","ARUBA",,,,,,"ARUBA"
+"0x6780","TAHITI_6780","TAHITI",,,,,,"TAHITI"
+"0x6784","TAHITI_6784","TAHITI",,,,,,"TAHITI"
+"0x6788","TAHITI_6788","TAHITI",,,,,,"TAHITI"
+"0x678A","TAHITI_678A","TAHITI",,,,,,"TAHITI"
+"0x6790","TAHITI_6790","TAHITI",,,,,,"TAHITI"
+"0x6798","TAHITI_6798","TAHITI",,,,,,"TAHITI"
+"0x6799","TAHITI_6799","TAHITI",,,,,,"TAHITI"
+"0x679A","TAHITI_679A","TAHITI",,,,,,"TAHITI"
+"0x679E","TAHITI_679E","TAHITI",,,,,,"TAHITI"
+"0x679F","TAHITI_679F","TAHITI",,,,,,"TAHITI"
+"0x6800","PITCAIRN_6800","PITCAIRN",1,,,,,"PITCAIRN"
+"0x6801","PITCAIRN_6801","PITCAIRN",1,,,,,"PITCAIRN"
+"0x6802","PITCAIRN_6802","PITCAIRN",1,,,,,"PITCAIRN"
+"0x6808","PITCAIRN_6808","PITCAIRN",,,,,,"PITCAIRN"
+"0x6809","PITCAIRN_6809","PITCAIRN",,,,,,"PITCAIRN"
+"0x6810","PITCAIRN_6810","PITCAIRN",,,,,,"PITCAIRN"
+"0x6818","PITCAIRN_6818","PITCAIRN",,,,,,"PITCAIRN"
+"0x6819","PITCAIRN_6819","PITCAIRN",,,,,,"PITCAIRN"
+"0x684C","PITCAIRN_684C","PITCAIRN",,,,,,"PITCAIRN"
+"0x6820","VERDE_6820","VERDE",1,,,,,"VERDE"
+"0x6821","VERDE_6821","VERDE",1,,,,,"VERDE"
+"0x6823","VERDE_6823","VERDE",1,,,,,"VERDE"
+"0x6824","VERDE_6824","VERDE",1,,,,,"VERDE"
+"0x6825","VERDE_6825","VERDE",1,,,,,"VERDE"
+"0x6826","VERDE_6826","VERDE",1,,,,,"VERDE"
+"0x6827","VERDE_6827","VERDE",1,,,,,"VERDE"
+"0x6828","VERDE_6828","VERDE",,,,,,"VERDE"
+"0x6829","VERDE_6829","VERDE",,,,,,"VERDE"
+"0x682B","VERDE_682B","VERDE",1,,,,,"VERDE"
+"0x682D","VERDE_682D","VERDE",1,,,,,"VERDE"
+"0x682F","VERDE_682F","VERDE",1,,,,,"VERDE"
+"0x6830","VERDE_6830","VERDE",1,,,,,"VERDE"
+"0x6831","VERDE_6831","VERDE",1,,,,,"VERDE"
+"0x6837","VERDE_6837","VERDE",,,,,,"VERDE"
+"0x6838","VERDE_6838","VERDE",,,,,,"VERDE"
+"0x6839","VERDE_6839","VERDE",,,,,,"VERDE"
+"0x683B","VERDE_683B","VERDE",,,,,,"VERDE"
+"0x683D","VERDE_683D","VERDE",,,,,,"VERDE"
+"0x683F","VERDE_683F","VERDE",,,,,,"VERDE"
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index c64c921..295a824 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -537,4 +537,43 @@ static RADEONCardInfo RADEONCards[] = {
{ 0x99A0, CHIP_FAMILY_ARUBA, 1, 0, 0, 0, 0 },
{ 0x99A2, CHIP_FAMILY_ARUBA, 1, 0, 0, 0, 0 },
{ 0x99A4, CHIP_FAMILY_ARUBA, 0, 0, 0, 0, 0 },
+ { 0x6780, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x6784, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x6788, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x678A, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x6790, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x6798, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x6799, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x679A, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x679E, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x679F, CHIP_FAMILY_TAHITI, 0, 0, 0, 0, 0 },
+ { 0x6800, CHIP_FAMILY_PITCAIRN, 1, 0, 0, 0, 0 },
+ { 0x6801, CHIP_FAMILY_PITCAIRN, 1, 0, 0, 0, 0 },
+ { 0x6802, CHIP_FAMILY_PITCAIRN, 1, 0, 0, 0, 0 },
+ { 0x6808, CHIP_FAMILY_PITCAIRN, 0, 0, 0, 0, 0 },
+ { 0x6809, CHIP_FAMILY_PITCAIRN, 0, 0, 0, 0, 0 },
+ { 0x6810, CHIP_FAMILY_PITCAIRN, 0, 0, 0, 0, 0 },
+ { 0x6818, CHIP_FAMILY_PITCAIRN, 0, 0, 0, 0, 0 },
+ { 0x6819, CHIP_FAMILY_PITCAIRN, 0, 0, 0, 0, 0 },
+ { 0x684C, CHIP_FAMILY_PITCAIRN, 0, 0, 0, 0, 0 },
+ { 0x6820, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6821, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6823, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6824, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6825, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6826, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6827, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6828, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
+ { 0x6829, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
+ { 0x682B, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x682D, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x682F, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6830, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6831, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x6837, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
+ { 0x6838, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
+ { 0x6839, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
+ { 0x683B, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
+ { 0x683D, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
+ { 0x683F, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
};
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
index 31b31ab..8e887ac 100644
--- a/src/radeon_chipset_gen.h
+++ b/src/radeon_chipset_gen.h
@@ -537,5 +537,44 @@ SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_ARUBA_99A0, "ARUBA" },
{ PCI_CHIP_ARUBA_99A2, "ARUBA" },
{ PCI_CHIP_ARUBA_99A4, "ARUBA" },
+ { PCI_CHIP_TAHITI_6780, "TAHITI" },
+ { PCI_CHIP_TAHITI_6784, "TAHITI" },
+ { PCI_CHIP_TAHITI_6788, "TAHITI" },
+ { PCI_CHIP_TAHITI_678A, "TAHITI" },
+ { PCI_CHIP_TAHITI_6790, "TAHITI" },
+ { PCI_CHIP_TAHITI_6798, "TAHITI" },
+ { PCI_CHIP_TAHITI_6799, "TAHITI" },
+ { PCI_CHIP_TAHITI_679A, "TAHITI" },
+ { PCI_CHIP_TAHITI_679E, "TAHITI" },
+ { PCI_CHIP_TAHITI_679F, "TAHITI" },
+ { PCI_CHIP_PITCAIRN_6800, "PITCAIRN" },
+ { PCI_CHIP_PITCAIRN_6801, "PITCAIRN" },
+ { PCI_CHIP_PITCAIRN_6802, "PITCAIRN" },
+ { PCI_CHIP_PITCAIRN_6808, "PITCAIRN" },
+ { PCI_CHIP_PITCAIRN_6809, "PITCAIRN" },
+ { PCI_CHIP_PITCAIRN_6810, "PITCAIRN" },
+ { PCI_CHIP_PITCAIRN_6818, "PITCAIRN" },
+ { PCI_CHIP_PITCAIRN_6819, "PITCAIRN" },
+ { PCI_CHIP_PITCAIRN_684C, "PITCAIRN" },
+ { PCI_CHIP_VERDE_6820, "VERDE" },
+ { PCI_CHIP_VERDE_6821, "VERDE" },
+ { PCI_CHIP_VERDE_6823, "VERDE" },
+ { PCI_CHIP_VERDE_6824, "VERDE" },
+ { PCI_CHIP_VERDE_6825, "VERDE" },
+ { PCI_CHIP_VERDE_6826, "VERDE" },
+ { PCI_CHIP_VERDE_6827, "VERDE" },
+ { PCI_CHIP_VERDE_6828, "VERDE" },
+ { PCI_CHIP_VERDE_6829, "VERDE" },
+ { PCI_CHIP_VERDE_682B, "VERDE" },
+ { PCI_CHIP_VERDE_682D, "VERDE" },
+ { PCI_CHIP_VERDE_682F, "VERDE" },
+ { PCI_CHIP_VERDE_6830, "VERDE" },
+ { PCI_CHIP_VERDE_6831, "VERDE" },
+ { PCI_CHIP_VERDE_6837, "VERDE" },
+ { PCI_CHIP_VERDE_6838, "VERDE" },
+ { PCI_CHIP_VERDE_6839, "VERDE" },
+ { PCI_CHIP_VERDE_683B, "VERDE" },
+ { PCI_CHIP_VERDE_683D, "VERDE" },
+ { PCI_CHIP_VERDE_683F, "VERDE" },
{ -1, NULL }
};
diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
index 12b198c..e16d551 100644
--- a/src/radeon_dri2.c
+++ b/src/radeon_dri2.c
@@ -1400,7 +1400,9 @@ radeon_dri2_screen_init(ScreenPtr pScreen)
info->dri2.device_name = drmGetDeviceNameFromFd(info->dri2.drm_fd);
- if ( (info->ChipFamily >= CHIP_FAMILY_R600) ) {
+ if ( (info->ChipFamily >= CHIP_FAMILY_TAHITI) ) {
+ dri2_info.driverName = SI_DRIVER_NAME;
+ } else if ( (info->ChipFamily >= CHIP_FAMILY_R600) ) {
dri2_info.driverName = R600_DRIVER_NAME;
} else if ( (info->ChipFamily >= CHIP_FAMILY_R300) ) {
dri2_info.driverName = R300_DRIVER_NAME;
diff --git a/src/radeon_glamor.c b/src/radeon_glamor.c
index 232332e..714dde9 100644
--- a/src/radeon_glamor.c
+++ b/src/radeon_glamor.c
@@ -135,18 +135,85 @@ radeon_glamor_create_textured_pixmap(PixmapPtr pixmap)
return FALSE;
}
+Bool radeon_glamor_pixmap_is_offscreen(PixmapPtr pixmap)
+{
+ struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
+ return priv && priv->bo;
+}
+
+Bool radeon_glamor_prepare_access(PixmapPtr pixmap, glamor_access_t access)
+{
+ ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
+ RADEONInfoPtr info = RADEONPTR(scrn);
+ struct radeon_bo *bo;
+ int ret;
+
+ if (access == GLAMOR_GPU_ACCESS_RW || access == GLAMOR_GPU_ACCESS_RO)
+ return info->ChipFamily < CHIP_FAMILY_TAHITI;
+
+ bo = radeon_get_pixmap_bo(pixmap);
+ if (bo) {
+ /* When falling back to swrast, flush all pending operations */
+ if (info->ChipFamily < CHIP_FAMILY_TAHITI)
+ radeon_glamor_flush(scrn);
+
+ ret = radeon_bo_map(bo, 1);
+ if (ret) {
+ xf86DrvMsg(scrn->scrnIndex, X_WARNING,
+ "%s: bo map (tiling_flags %d, access %d)
failed: %s\n",
+ __FUNCTION__,
+
radeon_get_pixmap_private(pixmap)->tiling_flags,
+ access,
+ strerror(-ret));
+ return FALSE;
+ }
+
+ pixmap->devPrivate.ptr = bo->ptr;
+ }
+
+ return TRUE;
+}
+
+void
+radeon_glamor_finish_access(PixmapPtr pixmap, glamor_access_t access)
+{
+ struct radeon_bo *bo;
+
+ switch(access) {
+ case GLAMOR_GPU_ACCESS_RW:
+ case GLAMOR_GPU_ACCESS_RO:
+ break;
+ case GLAMOR_CPU_ACCESS_RO:
+ case GLAMOR_CPU_ACCESS_RW:
+ bo = radeon_get_pixmap_bo(pixmap);
+ if (bo) {
+ radeon_bo_unmap(bo);
+ pixmap->devPrivate.ptr = NULL;
+ }
+ break;
+ default:
+ ErrorF("Invalid access mode %d\n", access);
+ }
+
+ return;
+}
+
static PixmapPtr
radeon_glamor_create_pixmap(ScreenPtr screen, int w, int h, int depth,
unsigned usage)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
+ RADEONInfoPtr info = RADEONPTR(scrn);
struct radeon_pixmap *priv;
PixmapPtr pixmap, new_pixmap = NULL;
if (!(usage & RADEON_CREATE_PIXMAP_DRI2)) {
- pixmap = glamor_create_pixmap(screen, w, h, depth, usage);
- if (pixmap)
- return pixmap;
+ if (info->ChipFamily < CHIP_FAMILY_TAHITI) {
+ pixmap = glamor_create_pixmap(screen, w, h, depth,
usage);
+ if (pixmap)
+ return pixmap;
+ } else
+ return fbCreatePixmap(screen, w, h, depth, usage);
}
if (w > 32767 || h > 32767)
@@ -230,9 +297,13 @@ Bool
radeon_glamor_init(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
+ RADEONInfoPtr info = RADEONPTR(scrn);
+ unsigned int glamor_init_flags = GLAMOR_INVERTED_Y_AXIS |
GLAMOR_USE_EGL_SCREEN;
- if (!glamor_init(screen, GLAMOR_INVERTED_Y_AXIS | GLAMOR_USE_EGL_SCREEN
|
- GLAMOR_USE_SCREEN | GLAMOR_USE_PICTURE_SCREEN)) {
+ if (info->ChipFamily < CHIP_FAMILY_TAHITI)
+ glamor_init_flags |= GLAMOR_USE_SCREEN |
GLAMOR_USE_PICTURE_SCREEN;
+
+ if (!glamor_init(screen, glamor_init_flags)) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"Failed to initialize glamor.\n");
return FALSE;
@@ -251,6 +322,13 @@ radeon_glamor_init(ScreenPtr screen)
#endif
return FALSE;
+ if (!(glamor_init_flags & GLAMOR_USE_SCREEN) &&
+ !glamor_screen_init(screen)) {
+ xf86DrvMsg(scrn->scrnIndex, X_ERROR,
+ "GLAMOR initialization failed\n");
+ return FALSE;
+ }
+
screen->CreatePixmap = radeon_glamor_create_pixmap;
screen->DestroyPixmap = radeon_glamor_destroy_pixmap;
diff --git a/src/radeon_glamor.h b/src/radeon_glamor.h
index 40c9092..f814e46 100644
--- a/src/radeon_glamor.h
+++ b/src/radeon_glamor.h
@@ -29,6 +29,7 @@
#ifdef USE_GLAMOR
+#include "radeon_glamor_wrappers.h"
#include "radeon_surface.h"
Bool radeon_glamor_pre_init(ScrnInfoPtr scrn);
@@ -42,6 +43,8 @@ Bool radeon_glamor_create_textured_pixmap(PixmapPtr pixmap);
void radeon_glamor_exchange_buffers(PixmapPtr src, PixmapPtr dst);
Bool radeon_glamor_pixmap_is_offscreen(PixmapPtr pixmap);
+Bool radeon_glamor_prepare_access(PixmapPtr pixmap, glamor_access_t access);
+void radeon_glamor_finish_access(PixmapPtr pixmap, glamor_access_t access);
struct radeon_pixmap {
struct radeon_surface surface;
@@ -85,6 +88,8 @@ static inline Bool
radeon_glamor_create_textured_pixmap(PixmapPtr pixmap) { retu
static inline void radeon_glamor_exchange_buffers(PixmapPtr src, PixmapPtr
dst) {}
static inline Bool radeon_glamor_pixmap_is_offscreen(PixmapPtr pixmap) {
return FALSE; }
+static inline Bool radeon_glamor_prepare_access(PixmapPtr pixmap, int access)
{ return FALSE; }
+static inline void radeon_glamor_finish_access(PixmapPtr pixmap, int access) {}
static inline struct radeon_pixmap *radeon_get_pixmap_private(PixmapPtr
pixmap) { return NULL; }
diff --git a/src/radeon_glamor_wrappers.c b/src/radeon_glamor_wrappers.c
new file mode 100644
index 0000000..d0eb383
--- /dev/null
+++ b/src/radeon_glamor_wrappers.c
@@ -0,0 +1,1870 @@
+/*
+ * Copyright � 2001 Keith Packard
+ * 2010 Intel Corporation
+ * 2012 Advanced Micro Devices, Inc.
+ *
+ * Partly based on code Copyright � 2008 Red Hat, Inc.
+ * Partly based on code Copyright � 2000 SuSE, Inc.
+ *
+ * Partly based on code that is Copyright � The XFree86 Project Inc.
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of the opyright holders not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. The copyright holders make no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+
+#ifdef HAVE_DIX_CONFIG_H
+#include <dix-config.h>
+#endif
+
+#include <stdlib.h>
+
+#include "radeon_glamor_wrappers.h"
+#include "mipict.h"
+
+
+#if HAS_DEVPRIVATEKEYREC
+DevPrivateKeyRec glamor_screen_index;
+#else
+int glamor_screen_index;
+#endif
+
+/**
+ * glamor_get_drawable_pixmap() returns a backing pixmap for a given drawable.
+ *
+ * @param pDrawable the drawable being requested.
+ *
+ * This function returns the backing pixmap for a drawable, whether it is a
+ * redirected window, unredirected window, or already a pixmap. Note that
+ * coordinate translation is needed when drawing to the backing pixmap of a
+ * redirected window, and the translation coordinates are provided by calling
+ * glamor_get_drawable_pixmap() on the drawable.
+ */
+static PixmapPtr glamor_get_drawable_pixmap(DrawablePtr pDrawable)
+{
+ if (pDrawable->type == DRAWABLE_WINDOW)
+ return pDrawable->pScreen->
+ GetWindowPixmap((WindowPtr) pDrawable);
+ else
+ return (PixmapPtr) pDrawable;
+}
+
+/**
+ * Sets the offsets to add to coordinates to make them address the same bits in
+ * the backing drawable. These coordinates are nonzero only for redirected
+ * windows.
+ */
+static void
+glamor_get_drawable_deltas(DrawablePtr pDrawable, PixmapPtr pPixmap,
+ int *xp, int *yp)
+{
+#ifdef COMPOSITE
+ if (pDrawable->type == DRAWABLE_WINDOW) {
+ *xp = -pPixmap->screen_x;
+ *yp = -pPixmap->screen_y;
+ return;
+ }
+#endif
+
+ *xp = 0;
+ *yp = 0;
+}
+
+/**
+ * glamor_drawable_is_offscreen() is a convenience wrapper for
+ * radeon_glamor_pixmap_is_offscreen().
+ */
+static Bool glamor_drawable_is_offscreen(DrawablePtr pDrawable)
+{
+ return
radeon_glamor_pixmap_is_offscreen(glamor_get_drawable_pixmap(pDrawable));
+}
+
+/**
+ * glamor_prepare_access() is GLAMOR's wrapper for the driver's
PrepareAccess() handler.
+ *
+ * It deals with waiting for synchronization with the card, determining if
+ * PrepareAccess() is necessary, and working around PrepareAccess() failure.
+ */
+static Bool glamor_prepare_access(DrawablePtr pDrawable, glamor_access_t
access)
+{
+ PixmapPtr pPixmap = glamor_get_drawable_pixmap(pDrawable);
+
+ return radeon_glamor_prepare_access(pPixmap, access);
+}
+
+/**
+ * glamor_finish_access() is GLAMOR's wrapper for the driver's finish_access()
handler.
+ *
+ * It deals with calling the driver's finish_access() only if necessary.
+ */
+static void glamor_finish_access(DrawablePtr pDrawable, glamor_access_t access)
+{
+ PixmapPtr pPixmap = glamor_get_drawable_pixmap(pDrawable);
+
+ radeon_glamor_finish_access(pPixmap, access);
+}
+
+static Bool glamor_prepare_access_window(WindowPtr pWin)
+{
+ if (pWin->backgroundState == BackgroundPixmap) {
+ if (!glamor_prepare_access
+ (&pWin->background.pixmap->drawable, GLAMOR_CPU_ACCESS_RO))
+ return FALSE;
+ }
+
+ if (pWin->borderIsPixel == FALSE) {
+ if (!glamor_prepare_access
+ (&pWin->border.pixmap->drawable, GLAMOR_CPU_ACCESS_RO)) {
+ if (pWin->backgroundState == BackgroundPixmap)
+ glamor_finish_access(&pWin->background.pixmap->
+ drawable,
GLAMOR_CPU_ACCESS_RO);
+ return FALSE;
+ }
+ }
+ return TRUE;
+}
+
+static void glamor_finish_access_window(WindowPtr pWin)
+{
+ if (pWin->backgroundState == BackgroundPixmap)
+ glamor_finish_access(&pWin->background.pixmap->drawable,
GLAMOR_CPU_ACCESS_RO);
+
+ if (pWin->borderIsPixel == FALSE)
+ glamor_finish_access(&pWin->border.pixmap->drawable,
GLAMOR_CPU_ACCESS_RO);
+}
+
+static Bool glamor_change_window_attributes(WindowPtr pWin, unsigned long mask)
+{
+ Bool ret;
+
+ if (!glamor_prepare_access_window(pWin))
+ return FALSE;
+ ret = fbChangeWindowAttributes(pWin, mask);
+ glamor_finish_access_window(pWin);
+ return ret;
+}
+
+static RegionPtr glamor_bitmap_to_region(PixmapPtr pPix)
+{
+ RegionPtr ret;
+ if (!glamor_prepare_access(&pPix->drawable, GLAMOR_CPU_ACCESS_RO))
+ return NULL;
+ ret = fbPixmapToRegion(pPix);
+ glamor_finish_access(&pPix->drawable, GLAMOR_CPU_ACCESS_RO);
+ return ret;
+}
+
+void glamor_set_fallback_debug(ScreenPtr screen, Bool enable)
+{
+ glamor_screen_t *glamor_screen = glamor_get_screen(screen);
+
+ glamor_screen->fallback_debug = enable;
+}
+
+
+/*
+ * These functions wrap the low-level fb rendering functions and
+ * synchronize framebuffer/accelerated drawing by stalling until
+ * the accelerator is idle
+ */
+
+/**
+ * Calls glamor_prepare_access with GLAMOR_PREPARE_SRC for the tile, if that
is the
+ * current fill style.
+ *
+ * Solid doesn't use an extra pixmap source, and Stippled/OpaqueStippled are
+ * 1bpp and never in fb, so we don't worry about them.
+ * We should worry about them for completeness sake and going forward.
+ */
+static Bool glamor_prepare_access_gc(GCPtr pGC)
+{
+ if (pGC->stipple)
+ if (!glamor_prepare_access(&pGC->stipple->drawable,
GLAMOR_CPU_ACCESS_RO))
+ return FALSE;
+ if (pGC->fillStyle == FillTiled)
+ if (!glamor_prepare_access
+ (&pGC->tile.pixmap->drawable, GLAMOR_CPU_ACCESS_RO)) {
+ if (pGC->stipple)
+ glamor_finish_access(&pGC->stipple->drawable,
GLAMOR_CPU_ACCESS_RO);
+ return FALSE;
+ }
+ return TRUE;
+}
+
+/**
+ * Finishes access to the tile in the GC, if used.
+ */
+static void glamor_finish_access_gc(GCPtr pGC)
+{
+ if (pGC->fillStyle == FillTiled)
+ glamor_finish_access(&pGC->tile.pixmap->drawable,
GLAMOR_CPU_ACCESS_RO);
+ if (pGC->stipple)
+ glamor_finish_access(&pGC->stipple->drawable,
GLAMOR_CPU_ACCESS_RO);
+}
+
+static Bool glamor_picture_prepare_access(PicturePtr picture, int mode)
+{
+ if (picture->pDrawable == NULL)
+ return TRUE;
+
+ if (!glamor_prepare_access(picture->pDrawable, mode))
+ return FALSE;
+
+ if (picture->alphaMap &&
+ !glamor_prepare_access(picture->alphaMap->pDrawable, mode)) {
+ glamor_finish_access(picture->pDrawable, mode);
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
+static void glamor_picture_finish_access(PicturePtr picture, int mode)
+{
+ if (picture->pDrawable == NULL)
+ return;
+
+ glamor_finish_access(picture->pDrawable, mode);
+ if (picture->alphaMap)
+ glamor_finish_access(picture->alphaMap->pDrawable, mode);
+}
+
+
+static char glamor_drawable_location(DrawablePtr pDrawable)
+{
+ return glamor_drawable_is_offscreen(pDrawable) ? 's' : 'm';
+}
+
+static void
+glamor_check_fill_spans(DrawablePtr pDrawable, GCPtr pGC, int nspans,
+ DDXPointPtr ppt, int *pwidth, int fSorted)
+{
+ ScreenPtr screen = pDrawable->pScreen;
+
+ GLAMOR_FALLBACK(("to %p (%c)\n", pDrawable,
+ glamor_drawable_location(pDrawable)));
+ if (glamor_prepare_access(pDrawable, GLAMOR_CPU_ACCESS_RW)) {
+ if (glamor_prepare_access_gc(pGC)) {
+ fbFillSpans(pDrawable, pGC, nspans, ppt, pwidth,
+ fSorted);
+ glamor_finish_access_gc(pGC);
+ }
+ glamor_finish_access(pDrawable, GLAMOR_CPU_ACCESS_RW);
+ }
+}
+
+static void
+glamor_check_set_spans(DrawablePtr pDrawable, GCPtr pGC, char *psrc,
+ DDXPointPtr ppt, int *pwidth, int nspans, int fSorted)
+{
+ ScreenPtr screen = pDrawable->pScreen;
+
+ GLAMOR_FALLBACK(("to %p (%c)\n", pDrawable,
+ glamor_drawable_location(pDrawable)));
+ if (glamor_prepare_access(pDrawable, GLAMOR_CPU_ACCESS_RW)) {
+ fbSetSpans(pDrawable, pGC, psrc, ppt, pwidth, nspans, fSorted);
+ glamor_finish_access(pDrawable, GLAMOR_CPU_ACCESS_RW);
+ }
+}
+
+static void
+glamor_check_put_image(DrawablePtr pDrawable, GCPtr pGC, int depth,
+ int x, int y, int w, int h, int leftPad, int format,
+ char *bits)
+{
+ ScreenPtr screen = pDrawable->pScreen;
+
+ GLAMOR_FALLBACK(("to %p (%c)\n", pDrawable,
+ glamor_drawable_location(pDrawable)));
+ if (glamor_prepare_access(pDrawable, GLAMOR_CPU_ACCESS_RW)) {
+ fbPutImage(pDrawable, pGC, depth, x, y, w, h, leftPad, format,
+ bits);
+ glamor_finish_access(pDrawable, GLAMOR_CPU_ACCESS_RW);
+ }
+}
+
+static RegionPtr
+glamor_check_copy_plane(DrawablePtr pSrc, DrawablePtr pDst, GCPtr pGC,
+ int srcx, int srcy, int w, int h, int dstx, int dsty,
+ unsigned long bitPlane)
+{
+ ScreenPtr screen = pSrc->pScreen;
+ RegionPtr ret = NULL;
+
+ GLAMOR_FALLBACK(("from %p to %p (%c,%c)\n", pSrc, pDst,
+ glamor_drawable_location(pSrc),
+ glamor_drawable_location(pDst)));
+ if (glamor_prepare_access(pDst, GLAMOR_CPU_ACCESS_RW)) {
+ if (glamor_prepare_access(pSrc, GLAMOR_CPU_ACCESS_RO)) {
--
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