Rebased ref, commits from common ancestor:
commit b1a401e6c9f204d33a55eee41897d66ab81d6117
Author: Søren Sandmann Pedersen <s...@redhat.com>
Date: Sat May 26 16:17:14 2012 -0400
Pre-release version bump to 0.26.0
diff --git a/configure.ac b/configure.ac
index 027a168..6cafab3 100644
--- a/configure.ac
+++ b/configure.ac
@@ -53,8 +53,8 @@ AC_PREREQ([2.57])
#
m4_define([pixman_major], 0)
-m4_define([pixman_minor], 25)
-m4_define([pixman_micro], 7)
+m4_define([pixman_minor], 26)
+m4_define([pixman_micro], 0)
m4_define([pixman_version],[pixman_major.pixman_minor.pixman_micro])
commit f71e3dba979fcfc1cf87d01137e1e32451a173b1
Author: Ingmar Runge <ing...@irsoft.de>
Date: Sat May 19 15:45:18 2012 +0200
Fix MSVC compilation
Only up to three SSE intrinsics supported in function declaration.
diff --git a/pixman/pixman-mmx.c b/pixman/pixman-mmx.c
index 01a2bc9..eb02d1a 100644
--- a/pixman/pixman-mmx.c
+++ b/pixman/pixman-mmx.c
@@ -598,14 +598,14 @@ pack_4xpacked565 (__m64 a, __m64 b)
#endif
}
+#ifndef _MSC_VER
+
static force_inline __m64
pack_4x565 (__m64 v0, __m64 v1, __m64 v2, __m64 v3)
{
return pack_4xpacked565 (pack8888 (v0, v1), pack8888 (v2, v3));
}
-#ifndef _MSC_VER
-
static force_inline __m64
pix_add_mul (__m64 x, __m64 a, __m64 y, __m64 b)
{
@@ -617,6 +617,11 @@ pix_add_mul (__m64 x, __m64 a, __m64 y, __m64 b)
#else
+/* MSVC only handles a "pass by register" of up to three SSE intrinsics */
+
+#define pack_4x565(v0, v1, v2, v3) \
+ pack_4xpacked565 (pack8888 (v0, v1), pack8888 (v2, v3))
+
#define pix_add_mul(x, a, y, b) \
( x = pix_multiply (x, a), \
y = pix_multiply (y, b), \
commit 1e59e18d73a6e45729a99fe6ccc74d61631ff5f0
Author: Søren Sandmann Pedersen <s...@redhat.com>
Date: Thu May 24 15:30:41 2012 -0400
test: Composite with solid images instead of using pixman_image_fill_*
There is a couple of places where the test suite uses the
pixman_image_fill_* functions to initialize images. These functions
can fail, and will do so if the "fast" implementation is disabled.
So to make sure the test suite passes even using
PIXMAN_DISABLE="fast", use pixman_image_composite32() with a solid
image instead of pixman_image_fill_*.
diff --git a/test/composite.c b/test/composite.c
index 48bde9c..94b4825 100644
--- a/test/composite.c
+++ b/test/composite.c
@@ -525,15 +525,16 @@ composite_test (image_t *dst,
int testno)
{
pixman_color_t fill;
- pixman_rectangle16_t rect;
color_t expected, tdst, tsrc, tmsk;
pixel_checker_t checker;
+ pixman_image_t *solid;
/* Initialize dst */
compute_pixman_color (dst->color, &fill);
- rect.x = rect.y = 0;
- rect.width = rect.height = dst->size;
- pixman_image_fill_rectangles (PIXMAN_OP_SRC, dst->image, &fill, 1, &rect);
+ solid = pixman_image_create_solid_fill (&fill);
+ pixman_image_composite32 (PIXMAN_OP_SRC, solid, NULL, dst->image,
+ 0, 0, 0, 0, 0, 0, dst->size, dst->size);
+ pixman_image_unref (solid);
if (mask)
{
@@ -644,16 +645,16 @@ image_init (image_t *info,
if (info->size)
{
- pixman_rectangle16_t rect;
+ pixman_image_t *solid;
info->image = pixman_image_create_bits (info->format->format,
info->size, info->size,
NULL, 0);
- rect.x = rect.y = 0;
- rect.width = rect.height = info->size;
- pixman_image_fill_rectangles (PIXMAN_OP_SRC, info->image, &fill,
- 1, &rect);
+ solid = pixman_image_create_solid_fill (&fill);
+ pixman_image_composite32 (PIXMAN_OP_SRC, solid, NULL, info->image,
+ 0, 0, 0, 0, 0, 0, info->size, info->size);
+ pixman_image_unref (solid);
if (sizes[size] & REPEAT)
{
diff --git a/test/scaling-crash-test.c b/test/scaling-crash-test.c
index ed57ae0..0dac892 100644
--- a/test/scaling-crash-test.c
+++ b/test/scaling-crash-test.c
@@ -32,8 +32,8 @@ run_test (int32_t dst_width,
pixman_transform_t transform;
uint32_t * srcbuf;
uint32_t * dstbuf;
- pixman_box32_t box = { 0, 0, src_width, src_height };
pixman_color_t color_cc = { 0xcccc, 0xcccc, 0xcccc, 0xcccc };
+ pixman_image_t * solid;
int result;
int i;
@@ -62,7 +62,10 @@ run_test (int32_t dst_width,
PIXMAN_a8r8g8b8, src_width, src_height,
srcbuf + (src_width + 10) * 5 + 5, (src_width + 10) * 4);
- pixman_image_fill_boxes (PIXMAN_OP_SRC, src_img, &color_cc, 1, &box);
+ solid = pixman_image_create_solid_fill (&color_cc);
+ pixman_image_composite32 (PIXMAN_OP_SRC, solid, NULL, src_img,
+ 0, 0, 0, 0, 0, 0, src_width, src_height);
+ pixman_image_unref (solid);
dst_img = pixman_image_create_bits (
PIXMAN_a8r8g8b8, dst_width, dst_height, dstbuf, dst_width * 4);
commit 30816e3068bccf7c78c78f916b54971d24873bdc
Author: Nemanja Lukic <nemanja.lu...@rt-rk.com>
Date: Thu May 3 00:03:43 2012 +0200
MIPS: DSPr2: Added bilinear over_8888_8_8888 fast path.
Performance numbers before/after on MIPS-74kc @ 1GHz
Referent (before):
cairo-perf-trace:
[ # ] backend test min(s) median(s) stddev. count
[ # ] image: pixman 0.25.3
[ 0] image firefox-fishtank 2289.180 2290.567 0.05% 5/6
Optimized:
cairo-perf-trace:
[ # ] backend test min(s) median(s) stddev. count
[ # ] image: pixman 0.25.3
[ 0] image firefox-fishtank 1700.925 1708.314 0.22% 5/6
diff --git a/pixman/pixman-mips-dspr2-asm.S b/pixman/pixman-mips-dspr2-asm.S
index f3908da..87558f0 100644
--- a/pixman/pixman-mips-dspr2-asm.S
+++ b/pixman/pixman-mips-dspr2-asm.S
@@ -747,3 +747,66 @@ LEAF_MIPS_DSPR2(pixman_composite_over_n_8_0565_asm_mips)
nop
END(pixman_composite_over_n_8_0565_asm_mips)
+
+LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_8888_8_8888_OVER_asm_mips)
+/*
+ * a0 - dst (a8r8g8b8)
+ * a1 - mask (a8)
+ * a2 - src_top (a8r8g8b8)
+ * a3 - src_bottom (a8r8g8b8)
+ * 16(sp) - wt
+ * 20(sp) - wb
+ * 24(sp) - vx
+ * 28(sp) - unit_x
+ * 32(sp) - w
+ */
+
+ SAVE_REGS_ON_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
+
+ lw v1, 60(sp) /* v1 = w(sp + 32 + 28 save regs stack offset)*/
+ beqz v1, 1f
+ nop
+
+ lw s0, 44(sp) /* s0 = wt */
+ lw s1, 48(sp) /* s1 = wb */
+ lw s2, 52(sp) /* s2 = vx */
+ lw s3, 56(sp) /* s3 = unit_x */
+ li v0, 256
+ li s8, 0x00ff00ff
+0:
+ andi t4, s2, 0xffff /* t4 = (short)vx */
+ srl t4, t4, 8 /* t4 = vx >> 8 */
+ subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
+
+ mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
+ mul s5, s0, t4 /* s5 = wt*(vx>>8) */
+ mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
+ mul s7, s1, t4 /* s7 = wb*(vx>>8) */
+
+ sra t9, s2, 16
+ sll t9, t9, 2
+ addiu t8, t9, 4
+ lwx t0, t9(a2) /* t0 = tl */
+ lwx t1, t8(a2) /* t1 = tr */
+ addiu v1, v1, -1
+ lwx t2, t9(a3) /* t2 = bl */
+ lwx t3, t8(a3) /* t3 = br */
+
+ BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, \
+ t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
+ lbu t1, 0(a1) /* t1 = mask */
+ lw t2, 0(a0) /* t2 = dst */
+ addiu a1, a1, 1
+ OVER_8888_8_8888 t0, t1, t2, t0, s8, t3, t4, t5, t6
+
+ addu s2, s2, s3 /* vx += unit_x; */
+ sw t0, 0(a0)
+ bnez v1, 0b
+ addiu a0, a0, 4
+
+1:
+ RESTORE_REGS_FROM_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
+ j ra
+ nop
+
+END(pixman_scaled_bilinear_scanline_8888_8_8888_OVER_asm_mips)
diff --git a/pixman/pixman-mips-dspr2-asm.h b/pixman/pixman-mips-dspr2-asm.h
index 8383060..7cf3281 100644
--- a/pixman/pixman-mips-dspr2-asm.h
+++ b/pixman/pixman-mips-dspr2-asm.h
@@ -566,4 +566,60 @@ LEAF_MIPS32R2(symbol) \
addu_s.qb \out2_8888, \d2_8888, \scratch2
.endm
+.macro BILINEAR_INTERPOLATE_SINGLE_PIXEL tl, tr, bl, br, \
+ scratch1, scratch2, \
+ alpha, red, green, blue \
+ wt1, wt2, wb1, wb2
+ andi \scratch1, \tl, 0xff
+ andi \scratch2, \tr, 0xff
+ andi \alpha, \bl, 0xff
+ andi \red, \br, 0xff
+
+ multu $ac0, \wt1, \scratch1
+ maddu $ac0, \wt2, \scratch2
+ maddu $ac0, \wb1, \alpha
+ maddu $ac0, \wb2, \red
+
+ ext \scratch1, \tl, 8, 8
+ ext \scratch2, \tr, 8, 8
+ ext \alpha, \bl, 8, 8
+ ext \red, \br, 8, 8
+
+ multu $ac1, \wt1, \scratch1
+ maddu $ac1, \wt2, \scratch2
+ maddu $ac1, \wb1, \alpha
+ maddu $ac1, \wb2, \red
+
+ ext \scratch1, \tl, 16, 8
+ ext \scratch2, \tr, 16, 8
+ ext \alpha, \bl, 16, 8
+ ext \red, \br, 16, 8
+
+ mflo \blue, $ac0
+
+ multu $ac2, \wt1, \scratch1
+ maddu $ac2, \wt2, \scratch2
+ maddu $ac2, \wb1, \alpha
+ maddu $ac2, \wb2, \red
+
+ ext \scratch1, \tl, 24, 8
+ ext \scratch2, \tr, 24, 8
+ ext \alpha, \bl, 24, 8
+ ext \red, \br, 24, 8
+
+ mflo \green, $ac1
+
+ multu $ac3, \wt1, \scratch1
+ maddu $ac3, \wt2, \scratch2
+ maddu $ac3, \wb1, \alpha
+ maddu $ac3, \wb2, \red
+
+ mflo \red, $ac2
+ mflo \alpha, $ac3
+
+ precr.qb.ph \alpha, \alpha, \red
+ precr.qb.ph \scratch1, \green, \blue
+ precrq.qb.ph \tl, \alpha, \scratch1
+.endm
+
#endif //PIXMAN_MIPS_DSPR2_ASM_H
diff --git a/pixman/pixman-mips-dspr2.c b/pixman/pixman-mips-dspr2.c
index 7081734..06d4335 100644
--- a/pixman/pixman-mips-dspr2.c
+++ b/pixman/pixman-mips-dspr2.c
@@ -58,6 +58,9 @@ PIXMAN_MIPS_BIND_FAST_PATH_N_MASK_DST (SKIP_ZERO_SRC,
over_n_8_8888,
PIXMAN_MIPS_BIND_FAST_PATH_N_MASK_DST (SKIP_ZERO_SRC, over_n_8_0565,
uint8_t, 1, uint16_t, 1)
+PIXMAN_MIPS_BIND_SCALED_BILINEAR_SRC_A8_DST (SKIP_ZERO_SRC, 8888_8_8888, OVER,
+ uint32_t, uint32_t)
+
static pixman_bool_t
pixman_fill_mips (uint32_t *bits,
int stride,
@@ -206,6 +209,9 @@ static const pixman_fast_path_t mips_dspr2_fast_paths[] =
PIXMAN_STD_FAST_PATH (OVER, solid, a8, r5g6b5,
mips_composite_over_n_8_0565),
PIXMAN_STD_FAST_PATH (OVER, solid, a8, b5g6r5,
mips_composite_over_n_8_0565),
+ SIMPLE_BILINEAR_A8_MASK_FAST_PATH (OVER, a8r8g8b8, a8r8g8b8,
mips_8888_8_8888),
+ SIMPLE_BILINEAR_A8_MASK_FAST_PATH (OVER, a8r8g8b8, x8r8g8b8,
mips_8888_8_8888),
+
{ PIXMAN_OP_NONE },
};
diff --git a/pixman/pixman-mips-dspr2.h b/pixman/pixman-mips-dspr2.h
index cc35d02..5036938 100644
--- a/pixman/pixman-mips-dspr2.h
+++ b/pixman/pixman-mips-dspr2.h
@@ -127,4 +127,56 @@ mips_composite_##name (pixman_implementation_t *imp,
\
} \
}
+/*****************************************************************************/
+
+#define PIXMAN_MIPS_BIND_SCALED_BILINEAR_SRC_A8_DST(flags, name, op, \
+ src_type, dst_type) \
+void \
+pixman_scaled_bilinear_scanline_##name##_##op##_asm_mips ( \
+ dst_type * dst, \
+ const uint8_t * mask, \
+ const src_type * top, \
+ const src_type * bottom, \
+ int wt, \
+ int wb, \
+ pixman_fixed_t x, \
+ pixman_fixed_t ux, \
+ int width); \
+ \
+static force_inline void \
+scaled_bilinear_scanline_mips_##name##_##op (dst_type * dst, \
+ const uint8_t * mask, \
+ const src_type * src_top, \
+ const src_type * src_bottom, \
+ int32_t w, \
+ int wt, \
+ int wb, \
+ pixman_fixed_t vx, \
+ pixman_fixed_t unit_x, \
+ pixman_fixed_t max_vx, \
+ pixman_bool_t zero_src) \
+{ \
+ if ((flags & SKIP_ZERO_SRC) && zero_src) \
+ return; \
+ pixman_scaled_bilinear_scanline_##name##_##op##_asm_mips ( \
+ dst, mask, src_top, src_bottom, wt, wb, vx, unit_x, w); \
+} \
+ \
+FAST_BILINEAR_MAINLOOP_COMMON (mips_##name##_cover_##op, \
+ scaled_bilinear_scanline_mips_##name##_##op, \
+ src_type, uint8_t, dst_type, COVER, \
+ FLAG_HAVE_NON_SOLID_MASK) \
+FAST_BILINEAR_MAINLOOP_COMMON (mips_##name##_none_##op, \
+ scaled_bilinear_scanline_mips_##name##_##op, \
+ src_type, uint8_t, dst_type, NONE, \
+ FLAG_HAVE_NON_SOLID_MASK) \
+FAST_BILINEAR_MAINLOOP_COMMON (mips_##name##_pad_##op, \
+ scaled_bilinear_scanline_mips_##name##_##op, \
+ src_type, uint8_t, dst_type, PAD, \
+ FLAG_HAVE_NON_SOLID_MASK) \
+FAST_BILINEAR_MAINLOOP_COMMON (mips_##name##_normal_##op, \
+ scaled_bilinear_scanline_mips_##name##_##op, \
+ src_type, uint8_t, dst_type, NORMAL, \
+ FLAG_HAVE_NON_SOLID_MASK)
+
#endif //PIXMAN_MIPS_DSPR2_H
commit aea0522f6f1a51b97a673cfe4dc157e501008580
Author: Nemanja Lukic <nemanja.lu...@rt-rk.com>
Date: Wed May 23 18:53:43 2012 +0200
MIPS: DSPr2: Fix bug in over_n_8888_8888_ca/over_n_8888_0565_ca routines
In main loop (unrolled by factor 2), instead of negating multiplied
mask values by srca, values of srca was negated, and passed as alpha
argument for
UN8x4_MUL_UN8x4_ADD_UN8x4 macro.
Instead of:
ma = ~ma;
UN8x4_MUL_UN8x4_ADD_UN8x4 (d, ma, s);
Code was doing this:
ma = ~srca;
UN8x4_MUL_UN8x4_ADD_UN8x4 (d, ma, s);
Key is in substituting registers s0/s1 (containing srca value), with
t0/t1 containing mask values multiplied by srca. Register usage is
also improved (less registers are saved on stack, for
over_n_8888_8888_ca routine).
The bug was introduced in commit d2ee5631 and revealed by composite test.
diff --git a/pixman/pixman-mips-dspr2-asm.S b/pixman/pixman-mips-dspr2-asm.S
index 68ad33f..f3908da 100644
--- a/pixman/pixman-mips-dspr2-asm.S
+++ b/pixman/pixman-mips-dspr2-asm.S
@@ -317,7 +317,7 @@
LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_8888_ca_asm_mips)
* a3 - w
*/
- SAVE_REGS_ON_STACK 16, s0, s1, s2, s3, s4, s5, s6, s7
+ SAVE_REGS_ON_STACK 8, s0, s1, s2, s3, s4, s5
beqz a3, 4f
nop
li t6, 0xff
@@ -337,23 +337,21 @@
LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_8888_ca_asm_mips)
beqz t2, 12f /* if (t0 == 0) && (t1 == 0) */
addiu a2, a2, 8
and t3, t0, t1
- move s0, t8 /* s0 = srca */
- move s1, t8 /* s1 = srca */
move t4, a1 /* t4 = src */
move t5, a1 /* t5 = src */
lw t2, 0(a0) /* t2 = dst */
beq t3, t7, 11f /* if (t0 == 0xffffffff) && (t1 == 0xffffffff) */
- lw t3, 4(a0) /* t0 = dst */
+ lw t3, 4(a0) /* t3 = dst */
MIPS_2xUN8x4_MUL_2xUN8x4 a1, a1, t0, t1, t4, t5, t9, s0, s1, s2, s3, s4, s5
- MIPS_2xUN8x4_MUL_2xUN8 t0, t1, t8, t8, s0, s1, t9, s2, s3, s4, s5, s6, s7
+ MIPS_2xUN8x4_MUL_2xUN8 t0, t1, t8, t8, t0, t1, t9, s0, s1, s2, s3, s4, s5
11:
- not s0, s0
- not s1, s1
- MIPS_2xUN8x4_MUL_2xUN8x4 t2, t3, s0, s1, s2, s3, t9, t0, t1, s4, s5, s6, s7
- addu_s.qb t0, t4, s2
- addu_s.qb t1, t5, s3
- sw t0, 0(a0)
- sw t1, 4(a0)
+ not t0, t0
+ not t1, t1
+ MIPS_2xUN8x4_MUL_2xUN8x4 t2, t3, t0, t1, t2, t3, t9, s0, s1, s2, s3, s4, s5
+ addu_s.qb t2, t4, t2
+ addu_s.qb t3, t5, t3
+ sw t2, 0(a0)
+ sw t3, 4(a0)
12:
addiu a3, a3, -2
addiu t1, a3, -1
@@ -369,20 +367,20 @@
LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_8888_ca_asm_mips)
beqz t2, 22f /* if (t0 == 0) & (t1 == 0) */
addiu a2, a2, 8
and t2, t0, t1
- move s0, a1
+ move t4, a1
beq t2, t7, 21f /* if (t0 == 0xffffffff) && (t1 == 0xffffffff) */
- move s1, a1
+ move t5, a1
lw t2, 0(a0) /* t2 = dst */
lw t3, 4(a0) /* t3 = dst */
MIPS_2xUN8x4_MUL_2xUN8x4 a1, a1, t0, t1, t4, t5, t9, s0, s1, s2, s3, s4, s5
not t0, t0
not t1, t1
- MIPS_2xUN8x4_MUL_2xUN8x4 t2, t3, t0, t1, s0, s1, t9, s2, s3, s4, s5, s6, s7
- addu_s.qb s0, t4, s0
- addu_s.qb s1, t5, s1
+ MIPS_2xUN8x4_MUL_2xUN8x4 t2, t3, t0, t1, t2, t3, t9, s0, s1, s2, s3, s4, s5
+ addu_s.qb t4, t4, t2
+ addu_s.qb t5, t5, t3
21:
- sw s0, 0(a0)
- sw s1, 4(a0)
+ sw t4, 0(a0)
+ sw t5, 4(a0)
22:
addiu a3, a3, -2
addiu t1, a3, -1
@@ -395,20 +393,19 @@
LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_8888_ca_asm_mips)
lw t1, 0(a2) /* t1 = mask */
beqz t1, 4f
nop
- move s0, t8 /* s0 = srca */
move t2, a1 /* t2 = src */
beq t1, t7, 31f
lw t0, 0(a0) /* t0 = dst */
MIPS_UN8x4_MUL_UN8x4 a1, t1, t2, t9, t3, t4, t5, t6
- MIPS_UN8x4_MUL_UN8 t1, t8, s0, t9, t3, t4, t5
+ MIPS_UN8x4_MUL_UN8 t1, t8, t1, t9, t3, t4, t5
31:
- not s0, s0
- MIPS_UN8x4_MUL_UN8x4 t0, s0, t3, t9, t4, t5, t6, t1
- addu_s.qb t0, t2, t3
+ not t1, t1
+ MIPS_UN8x4_MUL_UN8x4 t0, t1, t0, t9, t3, t4, t5, t6
+ addu_s.qb t0, t2, t0
sw t0, 0(a0)
4:
- RESTORE_REGS_FROM_STACK 16, s0, s1, s2, s3, s4, s5, s6, s7
+ RESTORE_REGS_FROM_STACK 8, s0, s1, s2, s3, s4, s5
j ra
nop
@@ -447,8 +444,8 @@
LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_0565_ca_asm_mips)
beqz t2, 12f /* if (t0 == 0) && (t1 == 0) */
addiu a2, a2, 8
and t3, t0, t1
- move t0, t8
- move t1, a1
+ move s2, a1 /* s2 = src */
+ move s3, a1 /* s3 = src */
lhu t2, 0(a0) /* t2 = dst */
beq t3, s1, 11f /* if (t0 == 0xffffffff) && (t1 == 0xffffffff) */
lhu t3, 2(a0) /* t3 = dst */
@@ -461,7 +458,7 @@
LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_0565_ca_asm_mips)
MIPS_2xUN8x4_MUL_2xUN8x4 s4, s5, t0, t1, s4, s5, t9, t4, s6, s7, s8, t0, t1
addu_s.qb s2, s2, s4
addu_s.qb s3, s3, s5
- CONVERT_2x8888_TO_2x0565 s2, s3, t2, t3, t5, t6, t7, s1, s2
+ CONVERT_2x8888_TO_2x0565 s2, s3, t2, t3, t5, t6, t7, s4, s5
sh t2, 0(a0)
sh t3, 2(a0)
12:
@@ -507,17 +504,16 @@
LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_0565_ca_asm_mips)
lw t1, 0(a2) /* t1 = mask */
beqz t1, 4f
nop
- move s0, t8 /* s0 = srca */
move t2, a1 /* t2 = src */
beq t1, t7, 31f
lhu t0, 0(a0) /* t0 = dst */
MIPS_UN8x4_MUL_UN8x4 a1, t1, t2, t9, t3, t4, t5, t6
- MIPS_UN8x4_MUL_UN8 t1, t8, s0, t9, t3, t4, t5
+ MIPS_UN8x4_MUL_UN8 t1, t8, t1, t9, t3, t4, t5
31:
- not s0, s0
+ not t1, t1
CONVERT_1x0565_TO_1x8888 t0, s1, s2, s3
- MIPS_UN8x4_MUL_UN8x4 s1, s0, t3, t9, t4, t5, t6, t1
+ MIPS_UN8x4_MUL_UN8x4 s1, t1, t3, t9, t4, t5, t6, t7
addu_s.qb t0, t2, t3
CONVERT_1x8888_TO_1x0565 t0, s1, s2, s3
sh s1, 0(a0)
commit 74bf5dc2f99245e7b486203b6ba074fb629eb5f3
Author: Søren Sandmann Pedersen <s...@redhat.com>
Date: Sun May 20 13:09:16 2012 -0400
demos: Add parrot.jpg to EXTRA_DIST
Pointed out by Cyril Brulebois.
diff --git a/demos/Makefile.am b/demos/Makefile.am
index 8f734cf..9aac1f5 100644
--- a/demos/Makefile.am
+++ b/demos/Makefile.am
@@ -22,7 +22,7 @@ DEMOS = \
quad2quad \
checkerboard
-EXTRA_DIST = parrot.c
+EXTRA_DIST = parrot.c parrot.jpg
gradient_test_SOURCES = gradient-test.c $(GTK_UTILS)
alpha_test_SOURCES = alpha-test.c $(GTK_UTILS)
commit 55698584be93706794b181cbf595846da578e103
Author: Matt Turner <matts...@gmail.com>
Date: Tue May 15 16:32:08 2012 -0400
configure.ac: Fail the ARM/iwMMXt test if not compiling with -march=iwmmxt
If not compiling with -march=iwmmxt, the configure test will still pass,
thinking that the __builtin_arm_* intrinsic is a function instead of
generating a single instruction. Since no linking is done, the configure
test doesn't catch this, and we get linking errors in the build.
diff --git a/configure.ac b/configure.ac
index 5ff78eb..027a168 100644
--- a/configure.ac
+++ b/configure.ac
@@ -619,6 +619,9 @@ AC_COMPILE_IFELSE([AC_LANG_SOURCE([[
#ifndef __arm__
#error "IWMMXT is only available on ARM"
#endif
+#ifndef __IWMMXT__
+#error "IWMMXT not enabled (with -march=iwmmxt)"
+#endif
#if defined(__GNUC__) && (__GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ <
5))
#error "Need GCC >= 4.5 for IWMMXT intrinsics"
#endif
commit 3682b615154338f9754e7c1e046b42bb8ad584fa
Author: Søren Sandmann Pedersen <s...@redhat.com>
Date: Tue May 15 13:38:44 2012 -0400
Post-release version bump to 0.25.7
diff --git a/configure.ac b/configure.ac
index 502815e..5ff78eb 100644
--- a/configure.ac
+++ b/configure.ac
@@ -54,7 +54,7 @@ AC_PREREQ([2.57])
m4_define([pixman_major], 0)
m4_define([pixman_minor], 25)
-m4_define([pixman_micro], 6)
+m4_define([pixman_micro], 7)
m4_define([pixman_version],[pixman_major.pixman_minor.pixman_micro])
commit 1e1a00e964a1d8ef43d6d75c1c3a0b5d518d1979
Author: Søren Sandmann Pedersen <s...@redhat.com>
Date: Tue May 15 13:20:09 2012 -0400
Pre-release version bump to 0.25.6
Note that 0.25.4 was a botched release that doesn't have a tag and
doesn't correspond to any commit ID. It was however uploaded and
announced, so I'll just use the 0.25.6 version number.
diff --git a/configure.ac b/configure.ac
index d949839..502815e 100644
--- a/configure.ac
+++ b/configure.ac
@@ -54,7 +54,7 @@ AC_PREREQ([2.57])
m4_define([pixman_major], 0)
m4_define([pixman_minor], 25)
-m4_define([pixman_micro], 3)
+m4_define([pixman_micro], 6)
m4_define([pixman_version],[pixman_major.pixman_minor.pixman_micro])
commit b2c16aaadfae64d2573abb537bfedd92c13b8d06
Author: Søren Sandmann Pedersen <s...@redhat.com>
Date: Tue May 15 13:19:19 2012 -0400
demos/Makefile.am: Add parrot.c to EXTRA_DIST
To get 'make distcheck' to pass.
diff --git a/demos/Makefile.am b/demos/Makefile.am
index a664d93..8f734cf 100644
--- a/demos/Makefile.am
+++ b/demos/Makefile.am
@@ -22,6 +22,8 @@ DEMOS = \
quad2quad \
checkerboard
+EXTRA_DIST = parrot.c
+
gradient_test_SOURCES = gradient-test.c $(GTK_UTILS)
alpha_test_SOURCES = alpha-test.c $(GTK_UTILS)
composite_test_SOURCES = composite-test.c $(GTK_UTILS)
commit 50d3088d7882e1054a35e917becb7752662da6f0
Author: Matt Turner <matts...@gmail.com>
Date: Fri May 11 21:59:13 2012 -0400
configure.ac: Rename loongson -> loongson-mmi
Make it match with the other fast paths, and the PIXMAN_DISABLE value is
already loongson-mmi.
diff --git a/configure.ac b/configure.ac
index 57fd060..d949839 100644
--- a/configure.ac
+++ b/configure.ac
@@ -278,7 +278,7 @@ if test "x$LS_CFLAGS" = "x" ; then
fi
have_loongson_mmi=no
-AC_MSG_CHECKING(whether to use Loongson MMI)
+AC_MSG_CHECKING(whether to use Loongson MMI assembler)
xserver_save_CFLAGS=$CFLAGS
CFLAGS=" $LS_CFLAGS $CFLAGS -I$srcdir"
@@ -301,12 +301,12 @@ int main () {
}]])], have_loongson_mmi=yes)
CFLAGS=$xserver_save_CFLAGS
-AC_ARG_ENABLE(loongson,
- [AC_HELP_STRING([--disable-loongson],
- [disable Loongson fast paths])],
- [enable_loongson=$enableval], [enable_loongson=auto])
+AC_ARG_ENABLE(loongson-mmi,
+ [AC_HELP_STRING([--disable-loongson-mmi],
+ [disable Loongson MMI fast paths])],
+ [enable_loongson_mmi=$enableval], [enable_loongson_mmi=auto])
-if test $enable_loongson = no ; then
+if test $enable_loongson_mmi = no ; then
have_loongson_mmi=disabled
fi
@@ -317,7 +317,7 @@ else
fi
AC_MSG_RESULT($have_loongson_mmi)
-if test $enable_loongson = yes && test $have_loongson_mmi = no ; then
+if test $enable_loongson_mmi = yes && test $have_loongson_mmi = no ; then
AC_MSG_ERROR([Loongson MMI not detected])
fi
commit a0a40cb822bec52494c64e6750be50b734dc29df
Author: Matt Turner <matts...@gmail.com>
Date: Fri May 11 21:49:42 2012 -0400
configure.ac: Fix loongson-mmi out-of-tree builds
When building out-of-tree, gcc wasn't able to find loongson-mmintrin.h
to compile the test program. Add -I$srcdir to CFLAGS to point gcc to it.
diff --git a/configure.ac b/configure.ac
index 345bc33..57fd060 100644
--- a/configure.ac
+++ b/configure.ac
@@ -281,7 +281,7 @@ have_loongson_mmi=no
AC_MSG_CHECKING(whether to use Loongson MMI)
xserver_save_CFLAGS=$CFLAGS
-CFLAGS=" $LS_CFLAGS $CFLAGS"
+CFLAGS=" $LS_CFLAGS $CFLAGS -I$srcdir"
AC_COMPILE_IFELSE([AC_LANG_SOURCE([[
#ifndef __mips_loongson_vector_rev
#error "Loongson Multimedia Instructions are only available on Loongson"
commit 618a08e6aa03b38e8dc71ac610f7fdd55e8a8558
Author: Nemanja Lukic <nemanja.lu...@rt-rk.com>
Date: Thu May 3 00:03:42 2012 +0200
MIPS: DSPr2: Added over_n_8_8888 and over_n_8_0565 fast paths.
Performance numbers before/after on MIPS-74kc @ 1GHz
Referent (before):
lowlevel-blt-bench:
over_n_8_8888 = L1: 10.40 L2: 9.79 M: 8.47 ( 33.62%) HT: 7.64
VT: 7.59 R: 7.48 RT: 5.30 ( 40Kops/s)
over_n_8_0565 = L1: 7.40 L2: 7.23 M: 6.78 ( 17.94%) HT: 6.23
VT: 6.17 R: 6.14 RT: 4.62 ( 37Kops/s)
Optimized:
lowlevel-blt-bench:
over_n_8_8888 = L1: 27.25 L2: 26.24 M: 18.15 ( 72.12%) HT: 14.52
VT: 14.31 R: 13.83 RT: 7.57 ( 48Kops/s)
over_n_8_0565 = L1: 18.91 L2: 17.59 M: 15.06 ( 39.90%) HT: 12.18
VT: 11.98 R: 11.83 RT: 6.80 ( 46Kops/s)
diff --git a/pixman/pixman-mips-dspr2-asm.S b/pixman/pixman-mips-dspr2-asm.S
index 6a0fc18..68ad33f 100644
--- a/pixman/pixman-mips-dspr2-asm.S
+++ b/pixman/pixman-mips-dspr2-asm.S
@@ -527,3 +527,227 @@
LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_0565_ca_asm_mips)
nop
END(pixman_composite_over_n_8888_0565_ca_asm_mips)
+
+LEAF_MIPS_DSPR2(pixman_composite_over_n_8_8888_asm_mips)
+/*
+ * a0 - dst (a8r8g8b8)
+ * a1 - src (32bit constant)
+ * a2 - mask (a8)
+ * a3 - w
+ */
+
+ SAVE_REGS_ON_STACK 4, s0, s1, s2, s3, s4
+ beqz a3, 4f
+ nop
+ li t4, 0x00ff00ff
+ li t5, 0xff
+ addiu t0, a3, -1
+ beqz t0, 3f /* last pixel */
+ srl t6, a1, 24 /* t6 = srca */
+ not s4, a1
+ beq t5, t6, 2f /* if (srca == 0xff) */
+ srl s4, s4, 24
+1:
+ /* a1 = src */
+ lbu t0, 0(a2) /* t0 = mask */
+ lbu t1, 1(a2) /* t1 = mask */
+ or t2, t0, t1
+ beqz t2, 111f /* if (t0 == 0) && (t1 == 0) */
+ addiu a2, a2, 2
+ and t3, t0, t1
+
+ lw t2, 0(a0) /* t2 = dst */
+ beq t3, t5, 11f /* if (t0 == 0xff) && (t1 == 0xff) */
+ lw t3, 4(a0) /* t3 = dst */
+
+ MIPS_2xUN8x4_MUL_2xUN8 a1, a1, t0, t1, s0, s1, t4, t6, t7, t8, t9, s2, s3
+ not s2, s0
+ not s3, s1
+ srl s2, s2, 24
+ srl s3, s3, 24
+ MIPS_2xUN8x4_MUL_2xUN8 t2, t3, s2, s3, t2, t3, t4, t0, t1, t6, t7, t8, t9
+ addu_s.qb s2, t2, s0
+ addu_s.qb s3, t3, s1
+ sw s2, 0(a0)
+ b 111f
+ sw s3, 4(a0)
+11:
+ MIPS_2xUN8x4_MUL_2xUN8 t2, t3, s4, s4, t2, t3, t4, t0, t1, t6, t7, t8, t9
+ addu_s.qb s2, t2, a1
+ addu_s.qb s3, t3, a1
+ sw s2, 0(a0)
+ sw s3, 4(a0)
+
+111:
+ addiu a3, a3, -2
+ addiu t0, a3, -1
+ bgtz t0, 1b
+ addiu a0, a0, 8
+ b 3f
+ nop
+2:
+ /* a1 = src */
+ lbu t0, 0(a2) /* t0 = mask */
+ lbu t1, 1(a2) /* t1 = mask */
+ or t2, t0, t1
+ beqz t2, 222f /* if (t0 == 0) && (t1 == 0) */
+ addiu a2, a2, 2
+ and t3, t0, t1
+ beq t3, t5, 22f /* if (t0 == 0xff) && (t1 == 0xff) */
+ nop
+ lw t2, 0(a0) /* t2 = dst */
+ lw t3, 4(a0) /* t3 = dst */
+
+ OVER_2x8888_2x8_2x8888 a1, a1, t0, t1, t2, t3, \
+ t6, t7, t4, t8, t9, s0, s1, s2, s3
+ sw t6, 0(a0)
+ b 222f
+ sw t7, 4(a0)
+22:
+ sw a1, 0(a0)
+ sw a1, 4(a0)
+222:
+ addiu a3, a3, -2
+ addiu t0, a3, -1
+ bgtz t0, 2b
+ addiu a0, a0, 8
+3:
+ blez a3, 4f
+ nop
+ /* a1 = src */
+ lbu t0, 0(a2) /* t0 = mask */
+ beqz t0, 4f /* if (t0 == 0) */
+ addiu a2, a2, 1
+ move t3, a1
+ beq t0, t5, 31f /* if (t0 == 0xff) */
+ lw t1, 0(a0) /* t1 = dst */
+
+ MIPS_UN8x4_MUL_UN8 a1, t0, t3, t4, t6, t7, t8
+31:
+ not t2, t3
+ srl t2, t2, 24
+ MIPS_UN8x4_MUL_UN8 t1, t2, t1, t4, t6, t7, t8
+ addu_s.qb t2, t1, t3
+ sw t2, 0(a0)
+4:
+ RESTORE_REGS_FROM_STACK 4, s0, s1, s2, s3, s4
+ j ra
+ nop
+
+END(pixman_composite_over_n_8_8888_asm_mips)
+
+LEAF_MIPS_DSPR2(pixman_composite_over_n_8_0565_asm_mips)
+/*
+ * a0 - dst (r5g6b5)
+ * a1 - src (32bit constant)
+ * a2 - mask (a8)
+ * a3 - w
+ */
+ SAVE_REGS_ON_STACK 24, v0, s0, s1, s2, s3, s4, s5, s6, s7, s8
+ beqz a3, 4f
+ nop
+ li t4, 0x00ff00ff
+ li t5, 0xff
+ li t6, 0xf800f800
+ li t7, 0x07e007e0
+ li t8, 0x001F001F
+ addiu t1, a3, -1
+ beqz t1, 3f /* last pixel */
+ srl t0, a1, 24 /* t0 = srca */
+ not v0, a1
+ beq t0, t5, 2f /* if (srca == 0xff) */
+ srl v0, v0, 24
+1:
+ /* a1 = src */
+ lbu t0, 0(a2) /* t0 = mask */
+ lbu t1, 1(a2) /* t1 = mask */
+ or t2, t0, t1
+ beqz t2, 111f /* if (t0 == 0) && (t1 == 0) */
+ addiu a2, a2, 2
+ lhu t2, 0(a0) /* t2 = dst */
+ lhu t3, 2(a0) /* t3 = dst */
+ CONVERT_2x0565_TO_2x8888 t2, t3, s0, s1, t7, t8, t9, s2, s3, s4
+ and t9, t0, t1
+ beq t9, t5, 11f /* if (t0 == 0xff) && (t1 == 0xff) */
+ nop
+
+ MIPS_2xUN8x4_MUL_2xUN8 a1, a1, t0, t1, s2, s3, t4, t9, s4, s5, s6, s7, s8
+ not s4, s2
+ not s5, s3
+ srl s4, s4, 24
+ srl s5, s5, 24
+ MIPS_2xUN8x4_MUL_2xUN8 s0, s1, s4, s5, s0, s1, t4, t9, t0, t1, s6, s7, s8
+ addu_s.qb s4, s2, s0
+ addu_s.qb s5, s3, s1
+ CONVERT_2x8888_TO_2x0565 s4, s5, t2, t3, t6, t7, t8, s0, s1
+ sh t2, 0(a0)
+ b 111f
+ sh t3, 2(a0)
+11:
+ MIPS_2xUN8x4_MUL_2xUN8 s0, s1, v0, v0, s0, s1, t4, t9, t0, t1, s6, s7, s8
+ addu_s.qb s4, a1, s0
+ addu_s.qb s5, a1, s1
+ CONVERT_2x8888_TO_2x0565 s4, s5, t2, t3, t6, t7, t8, s0, s1
+ sh t2, 0(a0)
+ sh t3, 2(a0)
+111:
+ addiu a3, a3, -2
+ addiu t0, a3, -1
+ bgtz t0, 1b
+ addiu a0, a0, 4
+ b 3f
+ nop
+2:
+ CONVERT_1x8888_TO_1x0565 a1, s0, s1, s2
+21:
+ /* a1 = src */
+ lbu t0, 0(a2) /* t0 = mask */
+ lbu t1, 1(a2) /* t1 = mask */
+ or t2, t0, t1
+ beqz t2, 222f /* if (t0 == 0) && (t1 == 0) */
+ addiu a2, a2, 2
+ and t9, t0, t1
+ move s2, s0
+ beq t9, t5, 22f /* if (t0 == 0xff) && (t2 == 0xff) */
+ move s3, s0
+ lhu t2, 0(a0) /* t2 = dst */
+ lhu t3, 2(a0) /* t3 = dst */
+
+ CONVERT_2x0565_TO_2x8888 t2, t3, s2, s3, t7, t8, s4, s5, s6, s7
+ OVER_2x8888_2x8_2x8888 a1, a1, t0, t1, s2, s3, \
+ t2, t3, t4, t9, s4, s5, s6, s7, s8
+ CONVERT_2x8888_TO_2x0565 t2, t3, s2, s3, t6, t7, t8, s4, s5
+22:
+ sh s2, 0(a0)
+ sh s3, 2(a0)
+222:
+ addiu a3, a3, -2
+ addiu t0, a3, -1
+ bgtz t0, 21b
+ addiu a0, a0, 4
+3:
+ blez a3, 4f
+ nop
+ /* a1 = src */
+ lbu t0, 0(a2) /* t0 = mask */
+ beqz t0, 4f /* if (t0 == 0) */
+ nop
+ lhu t1, 0(a0) /* t1 = dst */
+ CONVERT_1x0565_TO_1x8888 t1, t2, t3, t7
+ beq t0, t5, 31f /* if (t0 == 0xff) */
+ move t3, a1
+
+ MIPS_UN8x4_MUL_UN8 a1, t0, t3, t4, t7, t8, t9
+31:
+ not t6, t3
+ srl t6, t6, 24
+ MIPS_UN8x4_MUL_UN8 t2, t6, t2, t4, t7, t8, t9
+ addu_s.qb t1, t2, t3
+ CONVERT_1x8888_TO_1x0565 t1, t2, t3, t7
--
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