debian/changelog | 2
debian/rules | 1
docs/news.html | 7 +++
docs/relnotes-7.11.html | 7 ++-
src/gallium/drivers/i915/i915_state_dynamic.c | 4 -
src/gallium/drivers/nouveau/nouveau_fence.c | 2
src/gallium/drivers/r300/r300_emit.c | 3 -
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 33 ++++++++++++++
src/gallium/winsys/radeon/drm/radeon_drm_cs.h | 1
src/gallium/winsys/radeon/drm/radeon_winsys.h | 4 +
src/glx/drisw_glx.c | 7 +++
src/mesa/drivers/dri/i915/i830_vtbl.c | 7 +++
src/mesa/drivers/dri/r300/compiler/radeon_dataflow.c | 2
src/mesa/drivers/dri/r300/compiler/radeon_optimize.c | 42 +++++++++----------
src/mesa/vbo/vbo_exec_array.c | 4 -
15 files changed, 92 insertions(+), 34 deletions(-)
New commits:
commit fe8296faacb8bfcf371565c838235e22d02f19df
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Sep 24 15:37:38 2011 +0200
Bump changelog
diff --git a/debian/changelog b/debian/changelog
index 5d49c39..02dbc43 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -2,6 +2,7 @@ mesa (7.11-6) UNRELEASED; urgency=low
* Inline what's left of debian/scripts/choose-configs in debian/rules.
* Enable texture-float for dri (closes: #635651).
+ * Update from upstream's 7.11 branch (commit e7794048)
-- Julien Cristau <jcris...@debian.org> Sun, 28 Aug 2011 19:46:58 +0200
commit e4598c2eee65b9ae7a058bafdc663f486fdf03e0
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Sep 24 15:34:24 2011 +0200
Enable texture-float for dri (closes: #635651).
diff --git a/debian/changelog b/debian/changelog
index 7641d2a..5d49c39 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,7 @@
mesa (7.11-6) UNRELEASED; urgency=low
* Inline what's left of debian/scripts/choose-configs in debian/rules.
+ * Enable texture-float for dri (closes: #635651).
-- Julien Cristau <jcris...@debian.org> Sun, 28 Aug 2011 19:46:58 +0200
diff --git a/debian/rules b/debian/rules
index a842bab..a7a55dc 100755
--- a/debian/rules
+++ b/debian/rules
@@ -114,6 +114,7 @@ confflags-dri = \
--with-dri-searchpath='/usr/lib/$(DEB_HOST_MULTIARCH)/dri:\$$$${ORIGIN}/dri:/usr/lib/dri'
\
--enable-glx-tls \
--enable-shared-glapi \
+ --enable-texture-float \
$(confflags_DIRECT_RENDERING) \
$(confflags_EGL) \
$(confflags_GALLIUM) \
commit e7794048ca8e4122e9e5de8ba4ab1f93331f2ba8
Author: Marcin Slusarz <marcin.slus...@gmail.com>
Date: Tue Sep 6 16:12:52 2011 +0200
nouveau: fix nouveau_fence leak
(commit 96054375b1ea98d7827f0d4b567168fa2baeb38e in master)
diff --git a/src/gallium/drivers/nouveau/nouveau_fence.c
b/src/gallium/drivers/nouveau/nouveau_fence.c
index d8f59dc..ea2038c 100644
--- a/src/gallium/drivers/nouveau/nouveau_fence.c
+++ b/src/gallium/drivers/nouveau/nouveau_fence.c
@@ -219,5 +219,7 @@ nouveau_fence_next(struct nouveau_screen *screen)
if (screen->fence.current->state < NOUVEAU_FENCE_STATE_EMITTED)
nouveau_fence_emit(screen->fence.current);
+ nouveau_fence_ref(NULL, &screen->fence.current);
+
nouveau_fence_new(screen, &screen->fence.current, FALSE);
}
commit e20346bfc888c545ae5d49642e1461e4b17e71a8
Author: Carl Simonson <simons...@gmail.com>
Date: Wed Aug 10 11:10:43 2011 -0700
i830: Add missing vtable entry for i830 from the hiz work.
(cherry picked from commit 09eeb0ff27005c0ffccd5cdbe46862e181a4ee6c)
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c
b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 3051835..7e982ea 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -883,6 +883,12 @@ i830_invalidate_state(struct intel_context *intel, GLuint
new_state)
i830_update_provoking_vertex(&intel->ctx);
}
+static bool
+i830_is_hiz_depth_format(struct intel_context *intel, gl_format format)
+{
+ return false;
+}
+
void
i830InitVtbl(struct i830_context *i830)
{
@@ -900,4 +906,5 @@ i830InitVtbl(struct i830_context *i830)
i830->intel.vtbl.finish_batch = intel_finish_vb;
i830->intel.vtbl.invalidate_state = i830_invalidate_state;
i830->intel.vtbl.render_target_supported = i830_render_target_supported;
+ i830->intel.vtbl.is_hiz_depth_format = i830_is_hiz_depth_format;
}
commit 2217a70aafbc84debc2817bbbbdd472055d18cb0
Author: David Reveman <reve...@chromium.org>
Date: Tue Aug 23 18:49:11 2011 -0700
i915g: Fix off-by-one in scissors.
diff --git a/src/gallium/drivers/i915/i915_state_dynamic.c
b/src/gallium/drivers/i915/i915_state_dynamic.c
index 204cee6..1a21433 100644
--- a/src/gallium/drivers/i915/i915_state_dynamic.c
+++ b/src/gallium/drivers/i915/i915_state_dynamic.c
@@ -268,8 +268,8 @@ static void upload_SCISSOR_RECT(struct i915_context *i915)
{
unsigned x1 = i915->scissor.minx;
unsigned y1 = i915->scissor.miny;
- unsigned x2 = i915->scissor.maxx;
- unsigned y2 = i915->scissor.maxy;
+ unsigned x2 = i915->scissor.maxx - 1;
+ unsigned y2 = i915->scissor.maxy - 1;
unsigned sc[3];
sc[0] = _3DSTATE_SCISSOR_RECT_0_CMD;
commit 6c1a9a327d031cd46680f28de8636b9335847650
Author: Tobias Droste <tdro...@gmx.de>
Date: Mon Jul 18 07:14:06 2011 +0200
r300/compiler: simplify code in peephole_add_presub_add
Signed-off-by: Tobias Droste <tdro...@gmx.de>
Signed-off-by: Marek Olšák <mar...@gmail.com>
(cherry picked from commit 84f8548dfcc7de55e162359e2e39af2614903cbe)
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_optimize.c
b/src/mesa/drivers/dri/r300/compiler/radeon_optimize.c
index b242742..39dcb21 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_optimize.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_optimize.c
@@ -561,28 +561,29 @@ static int peephole_add_presub_add(
struct rc_instruction * inst_add)
{
unsigned dstmask = inst_add->U.I.DstReg.WriteMask;
- struct rc_src_register * src1 = NULL;
- unsigned int i;
-
- if (!is_presub_candidate(c, inst_add))
- return 0;
+ unsigned src0_neg = inst_add->U.I.SrcReg[0].Negate & dstmask;
+ unsigned src1_neg = inst_add->U.I.SrcReg[1].Negate & dstmask;
if (inst_add->U.I.SrcReg[0].Swizzle != inst_add->U.I.SrcReg[1].Swizzle)
return 0;
- /* XXX This isn't fully implemented, is it? */
- /* src0 and src1 can't have absolute values only one can be negative
and they must be all negative or all positive. */
- for (i = 0; i < 2; i++) {
- if (inst_add->U.I.SrcReg[i].Abs)
- return 0;
+ /* src0 and src1 can't have absolute values */
+ if (inst_add->U.I.SrcReg[0].Abs || inst_add->U.I.SrcReg[1].Abs)
+ return 0;
- /* XXX This looks weird, but it's basically what was here
before this commit (see git blame): */
- if ((inst_add->U.I.SrcReg[i].Negate & dstmask) != dstmask &&
!src1) {
- src1 = &inst_add->U.I.SrcReg[i];
- }
- }
+ /* presub_replace_add() assumes only one is negative */
+ if (inst_add->U.I.SrcReg[0].Negate && inst_add->U.I.SrcReg[1].Negate)
+ return 0;
+
+ /* if src0 is negative, at least all bits of dstmask have to be set */
+ if (inst_add->U.I.SrcReg[0].Negate && src0_neg != dstmask)
+ return 0;
- if (!src1)
+ /* if src1 is negative, at least all bits of dstmask have to be set */
+ if (inst_add->U.I.SrcReg[1].Negate && src1_neg != dstmask)
+ return 0;
+
+ if (!is_presub_candidate(c, inst_add))
return 0;
if (presub_helper(c, inst_add, RC_PRESUB_ADD, presub_replace_add)) {
@@ -615,7 +616,7 @@ static void presub_replace_inv(
* of the add instruction must have the constatnt 1 swizzle. This function
* does not check const registers to see if their value is 1.0, so it should
* be called after the constant_folding optimization.
- * @return
+ * @return
* 0 if the ADD instruction is still part of the program.
* 1 if the ADD instruction is no longer part of the program.
*/
commit e33f306d6726b7582b0cfde99c132f7601b38752
Author: Marek Olšák <mar...@gmail.com>
Date: Fri Jul 15 20:52:16 2011 +0200
r300/compiler: remove an unused-but-set variable and simplify the code
(cherry picked from commit ed5e95ada6aa310266eb0969ac7d721c3664f1d1)
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_optimize.c
b/src/mesa/drivers/dri/r300/compiler/radeon_optimize.c
index ac73608..b242742 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_optimize.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_optimize.c
@@ -560,7 +560,7 @@ static int peephole_add_presub_add(
struct radeon_compiler * c,
struct rc_instruction * inst_add)
{
- struct rc_src_register * src0 = NULL;
+ unsigned dstmask = inst_add->U.I.DstReg.WriteMask;
struct rc_src_register * src1 = NULL;
unsigned int i;
@@ -570,18 +570,15 @@ static int peephole_add_presub_add(
if (inst_add->U.I.SrcReg[0].Swizzle != inst_add->U.I.SrcReg[1].Swizzle)
return 0;
- /* src0 and src1 can't have absolute values only one can be negative
and they must be all negative or all positive. */
+ /* XXX This isn't fully implemented, is it? */
+ /* src0 and src1 can't have absolute values only one can be negative
and they must be all negative or all positive. */
for (i = 0; i < 2; i++) {
if (inst_add->U.I.SrcReg[i].Abs)
return 0;
- if ((inst_add->U.I.SrcReg[i].Negate
- & inst_add->U.I.DstReg.WriteMask) ==
- inst_add->U.I.DstReg.WriteMask)
{
- src0 = &inst_add->U.I.SrcReg[i];
- } else if (!src1) {
+
+ /* XXX This looks weird, but it's basically what was here
before this commit (see git blame): */
+ if ((inst_add->U.I.SrcReg[i].Negate & dstmask) != dstmask &&
!src1) {
src1 = &inst_add->U.I.SrcReg[i];
- } else {
- src0 = &inst_add->U.I.SrcReg[i];
}
}
commit f69357d77afa8039d387d10ed8db700ecf63d913
Author: Marek Olšák <mar...@gmail.com>
Date: Fri Jul 15 20:25:38 2011 +0200
r300/compiler: fix a warning that a variable may be uninitialized
(cherry picked from commit 2ce6c3ea6e66a708aefba36358fa43f2f312c42f)
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_dataflow.c
b/src/mesa/drivers/dri/r300/compiler/radeon_dataflow.c
index b0deb75..a8decac 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_dataflow.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_dataflow.c
@@ -687,7 +687,7 @@ static void get_readers_for_single_write(
struct rc_instruction * tmp;
unsigned int branch_depth = 0;
struct rc_instruction * endloop = NULL;
- unsigned int abort_on_read_at_endloop;
+ unsigned int abort_on_read_at_endloop = 0;
struct get_readers_callback_data * d = userdata;
d->ReaderData->Writer = writer;
commit d8a0c1b4bc2c06fa26ed648e0b3be7f5d0dba8f9
Author: Marek Olšák <mar...@gmail.com>
Date: Sun Aug 7 18:35:06 2011 +0200
winsys/radeon: fix space checking
We should remove the relocations which caused a validation failure
from the list, so that the kernel receives only the validated ones.
NOTE: This is a candidate for the 7.11 branch.
(cherry picked from commit 64ab39b035f755510a644643b96451431bbe5f27)
Conflicts:
src/gallium/winsys/radeon/drm/radeon_drm_cs.c
diff --git a/src/gallium/drivers/r300/r300_emit.c
b/src/gallium/drivers/r300/r300_emit.c
index d214af4..09ce470 100644
--- a/src/gallium/drivers/r300/r300_emit.c
+++ b/src/gallium/drivers/r300/r300_emit.c
@@ -1237,13 +1237,12 @@ validate:
r300->rws->cs_add_reloc(r300->cs, r300_resource(index_buffer)->cs_buf,
r300_resource(index_buffer)->domain, 0);
- /* Now do the validation. */
+ /* Now do the validation (flush is called inside cs_validate on failure).
*/
if (!r300->rws->cs_validate(r300->cs)) {
/* Ooops, an infinite loop, give up. */
if (flushed)
return FALSE;
- r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL);
flushed = TRUE;
goto validate;
}
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 0139de1..1dcc7e1 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -115,6 +115,7 @@ static void radeon_cs_context_cleanup(struct
radeon_cs_context *csc)
}
csc->crelocs = 0;
+ csc->validated_crelocs = 0;
csc->chunks[0].length_dw = 0;
csc->chunks[1].length_dw = 0;
csc->used_gart = 0;
@@ -307,9 +308,37 @@ static void radeon_drm_cs_add_reloc(struct
radeon_winsys_cs *rcs,
static boolean radeon_drm_cs_validate(struct radeon_winsys_cs *rcs)
{
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
+ boolean status =
+ cs->csc->used_gart < cs->ws->gart_size * 0.8 &&
+ cs->csc->used_vram < cs->ws->vram_size * 0.8;
- return cs->csc->used_gart < cs->ws->gart_size * 0.8 &&
- cs->csc->used_vram < cs->ws->vram_size * 0.8;
+ if (status) {
+ cs->csc->validated_crelocs = cs->csc->crelocs;
+ } else {
+ /* Remove lately-added relocations. The validation failed with them
+ * and the CS is about to be flushed because of that. Keep only
+ * the already-validated relocations. */
+ unsigned i;
+
+ for (i = cs->csc->validated_crelocs; i < cs->csc->crelocs; i++) {
+ p_atomic_dec(&cs->csc->relocs_bo[i]->num_cs_references);
+ radeon_bo_reference(&cs->csc->relocs_bo[i], NULL);
+ }
+ cs->csc->crelocs = cs->csc->validated_crelocs;
+
+ /* Flush if there are any relocs. Clean up otherwise. */
+ if (cs->csc->crelocs) {
+ cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC);
+ } else {
+ radeon_cs_context_cleanup(cs->csc);
+
+ assert(cs->base.cdw == 0);
+ if (cs->base.cdw != 0) {
+ fprintf(stderr, "radeon: Unexpected error in %s.\n", __func__);
+ }
+ }
+ }
+ return status;
}
static void radeon_drm_cs_write_reloc(struct radeon_winsys_cs *rcs,
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
index 339beed..fc51f45 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
@@ -41,6 +41,7 @@ struct radeon_cs_context {
/* Relocs. */
unsigned nrelocs;
unsigned crelocs;
+ unsigned validated_crelocs;
struct radeon_bo **relocs_bo;
struct drm_radeon_cs_reloc *relocs;
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h
b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index 3a64e4a..41c26c6 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -271,7 +271,9 @@ struct radeon_winsys {
/**
* Return TRUE if there is enough memory in VRAM and GTT for the relocs
- * added so far.
+ * added so far. If the validation fails, all the relocations which have
+ * been added since the last call of cs_validate will be removed and
+ * the CS will be flushed (provided there are still any relocations).
*
* \param cs A command stream to validate.
*/
commit f396e43b7d609d93e5ba0b9053c16cec96f8e402
Author: Marek Olšák <mar...@gmail.com>
Date: Thu Aug 4 07:38:13 2011 +0200
vbo: do not call _mesa_max_buffer_index in debug builds
That code drops performance in Unigine Heaven and Tropics
by a factor of 10. That's too crazy even for a debug build.
NOTE: This is a candidate for the 7.11 branch.
Reviewed-by: Brian Paul <bri...@vmware.com>
(cherry picked from commit c251d83d916336f95109363e919920a024947230)
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c
index 7959337..5903ae23 100644
--- a/src/mesa/vbo/vbo_exec_array.c
+++ b/src/mesa/vbo/vbo_exec_array.c
@@ -909,11 +909,10 @@ vbo_exec_DrawRangeElementsBaseVertex(GLenum mode,
if (0)
_mesa_print_arrays(ctx);
-#ifdef DEBUG
/* 'end' was out of bounds, but now let's check the actual array
* indexes to see if any of them are out of bounds.
*/
- {
+ if (0) {
GLuint max = _mesa_max_buffer_index(ctx, count, type, indices,
ctx->Array.ElementArrayBufferObj);
if (max >= ctx->Array.ArrayObj->_MaxElement) {
@@ -934,7 +933,6 @@ vbo_exec_DrawRangeElementsBaseVertex(GLenum mode,
* upper bound wrong.
*/
}
-#endif
/* Set 'end' to the max possible legal value */
assert(ctx->Array.ArrayObj->_MaxElement >= 1);
commit aedfd07fb215c90dcb5c386277238ba87f664ed2
Author: Brian Paul <bri...@vmware.com>
Date: Tue Aug 2 10:38:17 2011 -0600
docs: news item for 7.11 release
diff --git a/docs/news.html b/docs/news.html
index eea6cd6..70b38c6 100644
--- a/docs/news.html
+++ b/docs/news.html
@@ -11,6 +11,13 @@
<H1>News</H1>
+<h2>July 31, 2011</h2>
+
+<p>
+<a href="relnotes-7.11.html">Mesa 7.11</a> is released. This is a new
+release with many new features.
+</p>
+
<h2>June 13, 2011</h2>
<p>
commit 9e669d9f28a5059943183fdb2cc3bedd1c8f0fdb
Author: Brian Paul <bri...@vmware.com>
Date: Tue Aug 2 10:38:03 2011 -0600
docs: add 7.11 md5 sums
diff --git a/docs/relnotes-7.11.html b/docs/relnotes-7.11.html
index 79776d3..52033cf 100644
--- a/docs/relnotes-7.11.html
+++ b/docs/relnotes-7.11.html
@@ -30,7 +30,12 @@ for DRI hardware acceleration.
<h2>MD5 checksums</h2>
<pre>
-tbd
+fa2c7068503133fb2453244cda11cb2a MesaLib-7.11.tar.gz
+ff03aca82d0560009a076a87c888cf13 MesaLib-7.11.tar.bz2
+ede1ac0976f6f05df586093fc17d63ed MesaLib-7.11.zip
+b4fb81a47c5caedaefad49af7702c23d MesaGLUT-7.11.tar.gz
+77a9a0bbd7f8bca882aa5709b88cb071 MesaGLUT-7.11.tar.bz2
+c19ef0c6eb61188c96ed4ccedd70717c MesaGLUT-7.11.zip
</pre>
commit 4258e9b3a5eeaa90f2a0485576d7d17d6d8e4d6f
Author: Marc Pignat <m...@pignat.org>
Date: Tue Jun 28 15:21:58 2011 +0200
drisw: Fix 24bpp software rendering, take 2
This patch add the support for 24bpp in the dri/swrast implementation.
See http://bugs.freedesktop.org/show_bug.cgi?id=23525
Signed-off-by: Marc Pignat <marc at pignat.org>
Signed-off-by: Brian Paul <bri...@vmware.com>
(cherry picked from commit cfec000e7514342fd51859906e173ba2d474a55c)
diff --git a/src/glx/drisw_glx.c b/src/glx/drisw_glx.c
index 07d4955..a57b327 100644
--- a/src/glx/drisw_glx.c
+++ b/src/glx/drisw_glx.c
@@ -100,6 +100,13 @@ XCreateDrawable(struct drisw_drawable * pdp,
32, /* bitmap_pad */
0); /* bytes_per_line */
+ /**
+ * swrast does not handle 24-bit depth with 24 bpp, so let X do the
+ * the conversion for us.
+ */
+ if (pdp->ximage->bits_per_pixel == 24)
+ pdp->ximage->bits_per_pixel = 32;
+
return True;
}
--
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