configure.ac | 15
man/nouveau.man | 3
src/Makefile.am | 3
src/drmmode_display.c | 42 -
src/nouveau_class.h | 975 ----------------------------------------
src/nouveau_dri2.c | 20
src/nouveau_exa.c | 50 +-
src/nouveau_local.h | 3
src/nouveau_wfb.c | 5
src/nouveau_xv.c | 59 +-
src/nv04_exa.c | 8
src/nv04_xv_blit.c | 2
src/nv10_exa.c | 1
src/nv30_exa.c | 1
src/nv30_shaders.c | 1
src/nv30_xv_tex.c | 1
src/nv40_exa.c | 1
src/nv40_xv_tex.c | 1
src/nv50_accel.c | 41 -
src/nv50_accel.h | 12
src/nv50_defs.xml.h | 144 +++++
src/nv50_exa.c | 5
src/nv50_xv.c | 141 +++++
src/nv_3ddefs.xml.h | 93 +++
src/nv_accel_common.c | 91 ++-
src/nv_const.h | 2
src/nv_dma.c | 21
src/nv_driver.c | 38 +
src/nv_include.h | 2
src/nv_object.xml.h | 246 ++++++++++
src/nv_proto.h | 37 +
src/nvc0_3d.xml.h | 1093 +++++++++++++++++++++++++++++++++++++++++++++
src/nvc0_accel.c | 731 ++++++++++++++++++++++++++++++
src/nvc0_accel.h | 83 +++
src/nvc0_exa.c | 1204 ++++++++++++++++++++++++++++++++++++++++++++++++++
src/nvc0_m2mf.xml.h | 138 +++++
src/nvc0_xv.c | 427 +++++++++++++++++
37 files changed, 4629 insertions(+), 1111 deletions(-)
New commits:
commit 92db2bc192a074d4b7fc3e9c16e9aa62a8deaeb6
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Thu Mar 3 22:17:23 2011 +0100
nvc0/accel: allow nvc1,nvc3,nvc4 in 3D engine init and use 9097
diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
index aef8305..c37b30c 100644
--- a/src/nvc0_accel.c
+++ b/src/nvc0_accel.c
@@ -92,6 +92,9 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn)
switch (pNv->dev->chipset) {
case 0xc0:
+ case 0xc1:
+ case 0xc3:
+ case 0xc4:
tclClass = 0x9097;
break;
default:
commit ace98a492353e6de712f4f717e6d3f562e3591f0
Author: Ben Skeggs <bske...@redhat.com>
Date: Tue Mar 1 13:54:38 2011 +1000
dri2: return an error rather than crashing if we can't allocate a buffer
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/src/nouveau_dri2.c b/src/nouveau_dri2.c
index d5afa8a..1a68ed3 100644
--- a/src/nouveau_dri2.c
+++ b/src/nouveau_dri2.c
@@ -29,6 +29,7 @@ nouveau_dri2_create_buffer(DrawablePtr pDraw, unsigned int
attachment,
ScreenPtr pScreen = pDraw->pScreen;
NVPtr pNv = NVPTR(xf86Screens[pScreen->myNum]);
struct nouveau_dri2_buffer *nvbuf;
+ struct nouveau_pixmap *nvpix;
PixmapPtr ppix;
nvbuf = calloc(1, sizeof(*nvbuf));
@@ -70,7 +71,14 @@ nouveau_dri2_create_buffer(DrawablePtr pDraw, unsigned int
attachment,
nvbuf->base.flags = 0;
nvbuf->ppix = ppix;
- nouveau_bo_handle_get(nouveau_pixmap(ppix)->bo, &nvbuf->base.name);
+ nvpix = nouveau_pixmap(ppix);
+ if (!nvpix || !nvpix->bo ||
+ nouveau_bo_handle_get(nvpix->bo, &nvbuf->base.name)) {
+ pScreen->DestroyPixmap(nvbuf->ppix);
+ free(nvbuf);
+ return NULL;
+ }
+
return &nvbuf->base;
}
commit bc5dec2ca7ca7edc340a99bd73946e228117dfd8
Author: Ben Skeggs <bske...@redhat.com>
Date: Thu Feb 24 15:15:00 2011 +1000
dri2: disable page flipping if any crtc is rotated
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/src/nouveau_dri2.c b/src/nouveau_dri2.c
index 45add0f..d5afa8a 100644
--- a/src/nouveau_dri2.c
+++ b/src/nouveau_dri2.c
@@ -134,7 +134,16 @@ static Bool
can_exchange(DrawablePtr draw, PixmapPtr dst_pix, PixmapPtr src_pix)
{
ScrnInfoPtr scrn = xf86Screens[draw->pScreen->myNum];
+ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
NVPtr pNv = NVPTR(scrn);
+ int i;
+
+ for (i = 0; i < xf86_config->num_crtc; i++) {
+ xf86CrtcPtr crtc = xf86_config->crtc[i];
+ if (crtc->enabled && crtc->rotatedData)
+ return FALSE;
+
+ }
return (!nouveau_exa_pixmap_is_onscreen(dst_pix) ||
(DRI2CanFlip(draw) && pNv->has_pageflip)) &&
commit c123618470b5ff32c6377a4cae0f148d4a518a5d
Author: Francesco Marella <francesco.mare...@gmail.com>
Date: Thu Feb 17 03:48:16 2011 +0100
Fix gcc 4.6.0 set but unused variable warnings
Signed-off-by: Francesco Marella <fm...@paranoici.org>
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index d14dd80..43a2672 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -1158,7 +1158,6 @@ static const xf86CrtcConfigFuncsRec
drmmode_xf86crtc_config_funcs = {
Bool drmmode_pre_init(ScrnInfoPtr pScrn, int fd, int cpp)
{
- xf86CrtcConfigPtr xf86_config;
drmmode_ptr drmmode;
int i;
@@ -1167,7 +1166,6 @@ Bool drmmode_pre_init(ScrnInfoPtr pScrn, int fd, int cpp)
drmmode->fb_id = 0;
xf86CrtcConfigInit(pScrn, &drmmode_xf86crtc_config_funcs);
- xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
drmmode->cpp = cpp;
drmmode->mode_res = drmModeGetResources(drmmode->fd);
diff --git a/src/nv_driver.c b/src/nv_driver.c
index 7497d7c..f503c39 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -601,7 +601,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
MessageType from;
const char *reason;
uint64_t v;
- int ret, i;
+ int ret;
if (flags & PROBE_DETECT) {
EntityInfoPtr pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
@@ -609,7 +609,6 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
if (!pEnt)
return FALSE;
- i = pEnt->index;
free(pEnt);
return TRUE;
commit 3531b2aa13e9c78288d96fe5e1492f0b6e899b00
Author: Francesco Marella <francesco.mare...@gmail.com>
Date: Thu Feb 17 03:47:46 2011 +0100
Page flipping man page update
Signed-off-by: Francesco Marella <fm...@paranoici.org>
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/man/nouveau.man b/man/nouveau.man
index 39de690..dd9d938 100644
--- a/man/nouveau.man
+++ b/man/nouveau.man
@@ -90,6 +90,9 @@ For example:
.B
Option \*qZaphodHeads\*q \*qLVDS,VGA-0\*q
will assign xrandr outputs LVDS and VGA-0 to this instance of the driver.
+.TP
+.BI "Option \*qPageFlip\*q \*q" boolean \*q
+Enable DRI2 page flipping. Default: on.
.SH "SEE ALSO"
__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__),
Xserver(__appmansuffix__), X(__miscmansuffix__)
.SH AUTHORS
commit 85a706df6f7986158c964e3afd0aa8e352ff5cea
Author: Francesco Marella <francesco.mare...@gmail.com>
Date: Thu Feb 17 03:47:08 2011 +0100
Update configure.ac with autoupdate
Signed-off-by: Francesco Marella <fm...@paranoici.org>
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/configure.ac b/configure.ac
index 676c2a4..6a143dc 100644
--- a/configure.ac
+++ b/configure.ac
@@ -20,11 +20,11 @@
#
# Process this file with autoconf to produce a configure script
-AC_PREREQ(2.57)
+AC_PREREQ([2.60])
AC_INIT([xf86-video-nouveau],
- 0.0.16,
+ [0.0.16],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
- xf86-video-nouveau)
+ [xf86-video-nouveau])
AC_DEFINE_UNQUOTED([NV_MAJOR_VERSION],
[$(echo $PACKAGE_VERSION | sed -e
's/^\([[0-9]]*\)\.[[0-9]]*\.[[0-9]]*/\1/')],
@@ -40,7 +40,7 @@ AC_DEFINE_UNQUOTED([NV_DRIVER_DATE],
[Driver date])
AC_CONFIG_SRCDIR([Makefile.am])
-AM_CONFIG_HEADER([config.h])
+AC_CONFIG_HEADERS([config.h])
AC_CONFIG_AUX_DIR(.)
AM_INIT_AUTOMAKE([dist-bzip2])
@@ -49,13 +49,13 @@ m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])])
# Checks for programs.
AC_DISABLE_STATIC
-AC_PROG_LIBTOOL
+LT_INIT
AC_PROG_CC
AH_TOP([#include "xorg-server.h"])
AC_ARG_WITH(xorg-module-dir,
- AC_HELP_STRING([--with-xorg-module-dir=DIR],
+ AS_HELP_STRING([--with-xorg-module-dir=DIR],
[Default xorg module directory
[[default=$libdir/xorg/modules]]]),
[moduledir="$withval"],
[moduledir="$libdir/xorg/modules"])
@@ -113,8 +113,9 @@ AC_SUBST([DRIVER_NAME])
XORG_MANPAGE_SECTIONS
XORG_RELEASE_VERSION
-AC_OUTPUT([
+AC_CONFIG_FILES([
Makefile
src/Makefile
man/Makefile
])
+AC_OUTPUT
commit 42c16ff33dcca6cd9bae62fe0d71a40452e03581
Author: Ben Skeggs <bske...@redhat.com>
Date: Wed Feb 16 13:51:54 2011 +1000
nv50: attempt to allocate compressed Z buffers
This should automagically fallback to the non-compressed version on kernels
that don't support compression.
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/src/nv_accel_common.c b/src/nv_accel_common.c
index ac4f628..735f47f 100644
--- a/src/nv_accel_common.c
+++ b/src/nv_accel_common.c
@@ -86,7 +86,7 @@ nouveau_allocate_surface(ScrnInfoPtr scrn, int width, int
height, int bpp,
tile_mode = 0;
if (usage_hint & NOUVEAU_CREATE_PIXMAP_ZETA)
- tile_flags = 0x2800;
+ tile_flags = 0x22800;
else if (usage_hint & NOUVEAU_CREATE_PIXMAP_SCANOUT)
tile_flags = (bpp == 16 ? 0x7000 : 0x7a00);
else
commit 46acb7e095e9c0d55b90070b77c64679fcfb9d4e
Author: Marcin Slusarz <marcin.slus...@gmail.com>
Date: Sun Feb 13 20:46:42 2011 +0100
fix drmSetMaster error reporting
On error, drmSetMaster returns -1 and sets errno.
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/src/nv_driver.c b/src/nv_driver.c
index 523cab8..7497d7c 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -334,7 +334,7 @@ NVEnterVT(int scrnIndex, int flags)
ret = drmSetMaster(nouveau_device(pNv->dev)->fd);
if (ret)
- ErrorF("Unable to get master: %d\n", ret);
+ ErrorF("Unable to get master: %s\n", strerror(errno));
if (!xf86SetDesiredModes(pScrn))
return FALSE;
commit 54764980411b4b8124c36edb8730612b04f292a9
Author: Maarten Maathuis <madman2...@gmail.com>
Date: Thu Feb 10 20:12:07 2011 +0100
Also flush from the BlockHandler.
- The fact that commit 02c50db307a4e4eeb87f7db5d401bc53cce3b21f
fixed missing text for some people proves this is needed.
That commit should have only improved latency a bit.
- The FlushCallback is still needed for DRI2 texture_from_pixmap.
- See bugs.fd.o #33977 for discussion.
Signed-off-by: Maarten Maathuis <madman2...@gmail.com>
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/src/nv_driver.c b/src/nv_driver.c
index 3e009fc..523cab8 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -384,15 +384,18 @@ NVBlockHandler (
)
{
ScreenPtr pScreen = screenInfo.screens[i];
- ScrnInfoPtr pScrnInfo = xf86Screens[i];
- NVPtr pNv = NVPTR(pScrnInfo);
+ ScrnInfoPtr pScrn = xf86Screens[i];
+ NVPtr pNv = NVPTR(pScrn);
pScreen->BlockHandler = pNv->BlockHandler;
(*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
pScreen->BlockHandler = NVBlockHandler;
+ if (pScrn->vtSema && !pNv->NoAccel)
+ FIRE_RING (pNv->chan);
+
if (pNv->VideoTimerCallback)
- (*pNv->VideoTimerCallback)(pScrnInfo, currentTime.milliseconds);
+ (*pNv->VideoTimerCallback)(pScrn, currentTime.milliseconds);
}
static Bool
commit 02c50db307a4e4eeb87f7db5d401bc53cce3b21f
Author: Maarten Maathuis <madman2...@gmail.com>
Date: Mon Feb 7 19:37:47 2011 +0100
exa: Flush (S)IFC to the frontbuffer immediately.
This avoids high latency while typing with core fonts for example.
Signed-off-by: Maarten Maathuis <madman2...@gmail.com>
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/src/nv04_exa.c b/src/nv04_exa.c
index 267c7b5..2603bd4 100644
--- a/src/nv04_exa.c
+++ b/src/nv04_exa.c
@@ -340,6 +340,7 @@ NV04EXAUploadIFC(ScrnInfoPtr pScrn, const char *src, int
src_pitch,
PixmapPtr pDst, int x, int y, int w, int h, int cpp)
{
NVPtr pNv = NVPTR(pScrn);
+ ScreenPtr pScreen = pDst->drawable.pScreen;
struct nouveau_channel *chan = pNv->chan;
struct nouveau_grobj *clip = pNv->NvClipRectangle;
struct nouveau_grobj *ifc = pNv->NvImageFromCpu;
@@ -413,6 +414,9 @@ NV04EXAUploadIFC(ScrnInfoPtr pScrn, const char *src, int
src_pitch,
}
chan->flush_notify = NULL;
+
+ if (pDst == pScreen->GetScreenPixmap(pScreen))
+ FIRE_RING(chan);
return TRUE;
}
diff --git a/src/nv50_exa.c b/src/nv50_exa.c
index e8ff5aa..85baa68 100644
--- a/src/nv50_exa.c
+++ b/src/nv50_exa.c
@@ -372,6 +372,7 @@ NV50EXAUploadSIFC(const char *src, int src_pitch,
PixmapPtr pdpix, int x, int y, int w, int h, int cpp)
{
NV50EXA_LOCALS(pdpix);
+ ScreenPtr pScreen = pdpix->drawable.pScreen;
int line_dwords = (w * cpp + 3) / 4;
uint32_t sifc_fmt;
@@ -428,6 +429,9 @@ NV50EXAUploadSIFC(const char *src, int src_pitch,
}
chan->flush_notify = NULL;
+
+ if (pdpix == pScreen->GetScreenPixmap(pScreen))
+ FIRE_RING(chan);
return TRUE;
}
diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c
index 45647ce..85cb5d2 100644
--- a/src/nvc0_exa.c
+++ b/src/nvc0_exa.c
@@ -550,6 +550,7 @@ NVC0EXAUploadSIFC(const char *src, int src_pitch,
PixmapPtr pdpix, int x, int y, int w, int h, int cpp)
{
NVC0EXA_LOCALS(pdpix);
+ ScreenPtr pScreen = pdpix->drawable.pScreen;
int line_dwords = (w * cpp + 3) / 4;
uint32_t sifc_fmt;
@@ -608,6 +609,9 @@ NVC0EXAUploadSIFC(const char *src, int src_pitch,
}
chan->flush_notify = NULL;
+
+ if (pdpix == pScreen->GetScreenPixmap(pScreen))
+ FIRE_RING(chan);
return TRUE;
}
commit e4fb9fd2f790ed66e4be61ca00d55522525619f4
Author: Ben Skeggs <bske...@redhat.com>
Date: Wed Feb 9 13:46:32 2011 +1000
dri2: allow page flipping to be disabled in xorg.conf
Signed-off-by: Ben Skeggs <bske...@redhat.com>
diff --git a/src/nv_const.h b/src/nv_const.h
index 01ffc2c..a27a951 100644
--- a/src/nv_const.h
+++ b/src/nv_const.h
@@ -14,6 +14,7 @@ typedef enum {
OPTION_WFB,
OPTION_GLX_VBLANK,
OPTION_ZAPHOD_HEADS,
+ OPTION_PAGE_FLIP,
} NVOpts;
@@ -26,6 +27,7 @@ static const OptionInfoRec NVOptions[] = {
{ OPTION_WFB, "WrappedFB", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_GLX_VBLANK, "GLXVBlank", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_ZAPHOD_HEADS, "ZaphodHeads", OPTV_STRING, {0}, FALSE },
+ { OPTION_PAGE_FLIP, "PageFlip", OPTV_BOOLEAN, {0},
FALSE },
{ -1, NULL, OPTV_NONE, {0}, FALSE }
};
diff --git a/src/nv_driver.c b/src/nv_driver.c
index 5286ff4..3e009fc 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -596,6 +596,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
struct nouveau_device *dev;
NVPtr pNv;
MessageType from;
+ const char *reason;
uint64_t v;
int ret, i;
@@ -812,14 +813,24 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
}
#ifdef NOUVEAU_GETPARAM_HAS_PAGEFLIP
+ reason = ": no kernel support";
+ from = X_DEFAULT;
+
ret = nouveau_device_get_param(pNv->dev,
NOUVEAU_GETPARAM_HAS_PAGEFLIP, &v);
- if (!ret)
- pNv->has_pageflip = v;
+ if (ret == 0 && v == 1) {
+ pNv->has_pageflip = TRUE;
+ if (xf86GetOptValBool(pNv->Options, OPTION_PAGE_FLIP,
&pNv->has_pageflip))
+ from = X_CONFIG;
+ reason = "";
+ }
#else
- (void)v;
+ reason = ": not available at build time";
#endif
+ xf86DrvMsg(pScrn->scrnIndex, from, "Page flipping %sabled%s\n",
+ pNv->has_pageflip ? "en" : "dis", reason);
+
if(xf86GetOptValInteger(pNv->Options, OPTION_VIDEO_KEY,
&(pNv->videoKey))) {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "video key set to
0x%x\n",
pNv->videoKey);
commit 38e8809bb415bae5c182fc79c8fc62992c5e4ed0
Author: Ben Skeggs <bske...@redhat.com>
Date: Mon Jan 17 09:14:31 2011 +1000
nvc0: merge initial acceleration support
Squashed commit of the following:
commit e8ce1ef351ee51bec51211dca6fda88fdbfbefee
Author: Ben Skeggs <bske...@redhat.com>
Date: Mon Jan 17 08:55:04 2011 +1000
fix hardcoding of nvc0 wfb path
commit b414b1f948da18d96309bad84c54948d877efaa6
Author: Ben Skeggs <bske...@redhat.com>
Date: Mon Jan 17 08:52:53 2011 +1000
general tidy-ups in preparation for merge to master
commit 73bf71d5de0cb990178a1d2a31e0ea1717c214a4
Merge: fb499a4 b795ca6
Author: Ben Skeggs <bske...@redhat.com>
Date: Mon Jan 17 08:47:40 2011 +1000
Merge branch 'master' into nvc0
commit fb499a4e9d95650dc89f4c1820b94d01344733f6
Author: Ben Skeggs <bske...@redhat.com>
Date: Mon Dec 20 12:54:43 2010 +1000
nvc0: switch to "standard" RING macros
commit 64f0e1d0e9e29c5437ad4e52d01ccfb0b03a2ae9
Merge: eba7e17 c2092a4
Author: Ben Skeggs <bske...@redhat.com>
Date: Mon Dec 20 11:58:42 2010 +1000
Merge branch 'master' into nvc0
Conflicts:
src/nv_dma.c
commit eba7e173a5006ff50b950d0e8b8154564471a9ce
Author: Ben Skeggs <bske...@redhat.com>
Date: Fri Dec 17 11:04:40 2010 +1000
nvc0/xv: use mad in nv12 shader, rather than mul+add
Signed-off-by: Ben Skeggs <bske...@redhat.com>
commit b025ceb40a5e94a3657f3c7f76044c49a1a05e8d
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Thu Dec 16 23:34:29 2010 +0100
nvc0: fix offset of 17bc buffer
I had messed it up in 5e4da3451c3c0f645f98fea7fb0ce2629b1bfd2f.
commit 6ff5a9a7f3411ef218f17fa481c583596ffde2cc
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Thu Dec 16 01:07:25 2010 +0100
nvc0/xv: bind textures for the FP, not the TEP
commit 5e4da3451c3c0f645f98fea7fb0ce2629b1bfd2f
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Thu Dec 16 01:02:58 2010 +0100
nvc0: switch to rnn headers
commit 0839041e79dbb0e629326d0f240220b33921db1a
Author: Ben Skeggs <bske...@redhat.com>
Date: Wed Dec 15 16:42:41 2010 +1000
nvc0/exa: fix m2mf dfs
commit 88c1c43302331e1cb8b7035bfb4677a5e7da3090
Author: Ben Skeggs <bske...@redhat.com>
Date: Mon Dec 13 12:00:23 2010 +1000
nvc0: add Xv implementation
commit ad5b4cfe388a102a0c93f7281cb4bba532b1796b
Merge: 1942a81 b6cb21b
Author: Ben Skeggs <bske...@redhat.com>
Date: Wed Dec 15 14:57:04 2010 +1000
Merge branch 'master' into nvc0
commit 1942a81c0eb592972d4a3e8c46b80192ae8d1a59
Author: Ben Skeggs <bske...@redhat.com>
Date: Thu Dec 9 12:48:27 2010 +1000
nvc0: call grobj_alloc for all used object classes
Though the hardware has no concept of object handles any more, the
nouveau
DRM still uses this call to know what engines are in use.
commit 0c670a6d406fe0a57373fa9e03005be6f28ecc3e
Author: Ben Skeggs <bske...@redhat.com>
Date: Thu Dec 9 12:44:41 2010 +1000
nvc0: don't try and create DmaNotifier0
commit 5d3d20d908a50ad7742567d58969c7f12dd944f7
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Thu Dec 9 01:36:32 2010 +0100
nvc0: change tile_mode to contain 0xZYX instead of 0xZY
Warning: the kernel will not like that (EVO)
commit dd7fd8263e0e9f92412fb20086e4c8acf8cab099
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Thu Dec 9 00:29:58 2010 +0100
exa: don't fall back to nv04 m2mf if nvc0 m2mf fails
commit b4cf5a8f2276392945c2530f0d6fe96b5ab4b5da
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Thu Dec 9 00:07:59 2010 +0100
nvc0/exa: remove noisy debug messages
commit 5419ef6d2cfabb7329982cb8dbdb5bbc8e973fe3
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Wed Dec 8 23:55:51 2010 +0100
nvc0/accel: remove unneeded scratch method 0x3420 init
It was intended be read by a MACRO method to get the address for
constants upload.
commit 178356391ff6831599eba257a5912079894641a1
Merge: 8573280 8bb8231
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Thu Dec 9 01:31:40 2010 +0100
Merge remote branch 'origin/master' into nvc0
Conflicts:
src/drmmode_display.c
src/nouveau_exa.c
src/nv_driver.c
src/nv_type.h
commit 8573280871401e29f27fa24d0b7c6ac5e35b2cc1
Author: Christoph Bumiller <e0425...@student.tuwien.ac.at>
Date: Sat Jul 3 14:27:36 2010 +0200
nvc0: initial implementation
EXA should work, Xv not yet done.
diff --git a/src/Makefile.am b/src/Makefile.am
index 9340c45..e9e84ae 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -58,6 +58,9 @@ nouveau_drv_la_SOURCES = \
nv50_exa.c \
nv50_xv.c \
nv50_texture.h \
+ nvc0_accel.c nvc0_accel.h \
+ nvc0_exa.c \
+ nvc0_xv.c \
drmmode_display.c \
vl_hwmc.c \
vl_hwmc.h
diff --git a/src/nouveau_class.h b/src/nouveau_class.h
index 5ce978a..5f4a829 100644
--- a/src/nouveau_class.h
+++ b/src/nouveau_class.h
@@ -735,44 +735,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH
0x0000023c
-#define NVC0_MEMORY_TO_MEMORY_FORMAT
0x00009039
-
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_NOP
0x00000100
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_SERIALIZE
0x00000110
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_MODE_IN
0x00000204
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_PITCH_IN
0x00000208
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_HEIGHT_IN
0x0000020c
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_DEPTH_IN
0x00000210
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN_Z
0x00000214
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_MODE_OUT
0x00000220
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_PITCH_OUT
0x00000224
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_HEIGHT_OUT
0x00000228
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_DEPTH_OUT
0x0000022c
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT_Z
0x00000230
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH
0x00000238
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_LOW
0x0000023c
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_EXEC
0x00000300
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_EXEC_PUSH
(1 << 0)
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_EXEC_LINEAR_IN
(1 << 4)
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_EXEC_LINEAR_OUT
(1 << 8)
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_EXEC_NOTIFY
(1 << 13)
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_EXEC_INC_SHIFT
20
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_EXEC_INC_MASK
0x00f00000
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_DATA
0x00000304
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH
0x0000030c
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_LOW
0x00000310
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_PITCH_IN
0x00000314
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_PITCH_OUT
0x00000318
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_LINE_LENGTH_IN
0x0000031c
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_LINE_COUNT
0x00000320
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_NOTIFY_ADDRESS_HIGH
0x0000032c
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_NOTIFY_ADDRESS_LOW
0x00000330
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_NOTIFY
0x00000334
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN_X
0x00000344
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN_Y
0x00000348
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT_X
0x0000034c
-#define NVC0_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT_Y
0x00000350
-
#define NV01_MEMORY_LOCAL_BANKED
0x0000003d
@@ -9112,938 +9074,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
#define NV50_COMPUTE_USER_PARAM__SIZE
0x00000040
-#define NVC0TCL
0x00009097
-
-#define NVC0TCL_SEMAPHORE_ADDRESS_HIGH
0x00000010
-#define NVC0TCL_SEMAPHORE_ADDRESS_LOW
0x00000014
-#define NVC0TCL_NOP
0x00000100
-#define NVC0TCL_NOTIFY_ADDRESS_HIGH
0x00000104
-#define NVC0TCL_NOTIFY_ADDRESS_LOW
0x00000108
-#define NVC0TCL_NOTIFY
0x0000010c
-#define NVC0TCL_SERIALIZE
0x00000110
-#define NVC0TCL_EARLY_FRAGMENT_TESTS
0x00000210
-#define NVC0TCL_TESS_MODE
0x00000320
-#define NVC0TCL_TESS_MODE_PRIM_SHIFT
0
-#define NVC0TCL_TESS_MODE_PRIM_MASK
0x0000000f
-#define NVC0TCL_TESS_MODE_PRIM_ISOLINES
0x00000000
-#define NVC0TCL_TESS_MODE_PRIM_TRIANGLES
0x00000001
-#define NVC0TCL_TESS_MODE_PRIM_QUADS
0x00000002
-#define NVC0TCL_TESS_MODE_SPACING_SHIFT
4
-#define NVC0TCL_TESS_MODE_SPACING_MASK
0x000000f0
-#define NVC0TCL_TESS_MODE_SPACING_EQUAL
0x00000000
-#define NVC0TCL_TESS_MODE_SPACING_FRACTIONAL_ODD
0x00000010
-#define NVC0TCL_TESS_MODE_SPACING_FRACTIONAL_EVEN
0x00000020
-#define NVC0TCL_TESS_MODE_CW
(1 << 8)
-#define NVC0TCL_TESS_MODE_CONNECTED
(1 << 9)
-#define NVC0TCL_TESS_LEVEL_OUTER(x)
(0x00000324+((x)*4))
-#define NVC0TCL_TESS_LEVEL_OUTER__SIZE
0x00000004
-#define NVC0TCL_TESS_LEVEL_INNER(x)
(0x00000334+((x)*4))
-#define NVC0TCL_TESS_LEVEL_INNER__SIZE
0x00000002
-#define NVC0TCL_RASTERIZE_ENABLE
0x0000037c
-#define NVC0TCL_TFB_BUFFER_ENABLE(x)
(0x00000380+((x)*32))
-#define NVC0TCL_TFB_BUFFER_ENABLE__SIZE
0x00000004
-#define NVC0TCL_TFB_ADDRESS_HIGH(x)
(0x00000384+((x)*32))
-#define NVC0TCL_TFB_ADDRESS_HIGH__SIZE
0x00000004
-#define NVC0TCL_TFB_ADDRESS_LOW(x)
(0x00000388+((x)*32))
-#define NVC0TCL_TFB_ADDRESS_LOW__SIZE
0x00000004
-#define NVC0TCL_TFB_BUFFER_SIZE(x)
(0x0000038c+((x)*32))
-#define NVC0TCL_TFB_BUFFER_SIZE__SIZE
0x00000004
-#define NVC0TCL_TFB_PRIMITIVE_ID(x)
(0x00000390+((x)*32))
-#define NVC0TCL_TFB_PRIMITIVE_ID__SIZE
0x00000004
-#define NVC0TCL_TFB_UNK0700(x)
(0x00000700+((x)*16))
-#define NVC0TCL_TFB_UNK0700__SIZE
0x00000004
-#define NVC0TCL_TFB_VARYING_COUNT(x)
(0x00000704+((x)*16))
-#define NVC0TCL_TFB_VARYING_COUNT__SIZE
0x00000004
-#define NVC0TCL_TFB_BUFFER_STRIDE(x)
(0x00000708+((x)*16))
-#define NVC0TCL_TFB_BUFFER_STRIDE__SIZE
0x00000004
-#define NVC0TCL_TFB_ENABLE
0x00000744
-#define NVC0TCL_LOCAL_BASE
0x0000077c
-#define NVC0TCL_UNK0790_ADDRESS_HIGH
0x00000790
-#define NVC0TCL_UNK0790_ADDRESS_LOW
0x00000794
-#define NVC0TCL_RT_ADDRESS_HIGH(x)
(0x00000800+((x)*32))
-#define NVC0TCL_RT_ADDRESS_HIGH__SIZE
0x00000008
-#define NVC0TCL_RT_ADDRESS_LOW(x)
(0x00000804+((x)*32))
-#define NVC0TCL_RT_ADDRESS_LOW__SIZE
0x00000008
-#define NVC0TCL_RT_HORIZ(x)
(0x00000808+((x)*32))
-#define NVC0TCL_RT_HORIZ__SIZE
0x00000008
-#define NVC0TCL_RT_VERT(x)
(0x0000080c+((x)*32))
-#define NVC0TCL_RT_VERT__SIZE
0x00000008
-#define NVC0TCL_RT_FORMAT(x)
(0x00000810+((x)*32))
-#define NVC0TCL_RT_FORMAT__SIZE
0x00000008
-#define NVC0TCL_RT_FORMAT_R32G32B32A32_FLOAT
0x000000c0
-#define NVC0TCL_RT_FORMAT_R32G32B32A32_SINT
0x000000c1
-#define NVC0TCL_RT_FORMAT_R32G32B32A32_UINT
0x000000c2
-#define NVC0TCL_RT_FORMAT_R32G32B32X32_FLOAT
0x000000c3
-#define NVC0TCL_RT_FORMAT_R16G16B16A16_UNORM
0x000000c6
-#define NVC0TCL_RT_FORMAT_R16G16B16A16_SNORM
0x000000c7
-#define NVC0TCL_RT_FORMAT_R16G16B16A16_SINT
0x000000c8
-#define NVC0TCL_RT_FORMAT_R16G16B16A16_UINT
0x000000c9
-#define NVC0TCL_RT_FORMAT_R16G16B16A16_FLOAT
0x000000ca
-#define NVC0TCL_RT_FORMAT_R32G32_FLOAT
0x000000cb
-#define NVC0TCL_RT_FORMAT_R32G32_SINT
0x000000cc
-#define NVC0TCL_RT_FORMAT_R32G32_UINT
0x000000cd
-#define NVC0TCL_RT_FORMAT_R16G16B16X16_FLOAT
0x000000ce
-#define NVC0TCL_RT_FORMAT_A8R8G8B8_UNORM
0x000000cf
-#define NVC0TCL_RT_FORMAT_A8R8G8B8_SRGB
0x000000d0
-#define NVC0TCL_RT_FORMAT_A2B10G10R10_UNORM
0x000000d1
-#define NVC0TCL_RT_FORMAT_A2B10G10R10_UINT
0x000000d2
-#define NVC0TCL_RT_FORMAT_A8B8G8R8_UNORM
0x000000d5
-#define NVC0TCL_RT_FORMAT_A8B8G8R8_SRGB
0x000000d6
-#define NVC0TCL_RT_FORMAT_A8B8G8R8_SNORM
0x000000d7
-#define NVC0TCL_RT_FORMAT_A8B8G8R8_SINT
0x000000d8
-#define NVC0TCL_RT_FORMAT_A8B8G8R8_UINT
0x000000d9
-#define NVC0TCL_RT_FORMAT_R16G16_UNORM
0x000000da
-#define NVC0TCL_RT_FORMAT_R16G16_SNORM
0x000000db
-#define NVC0TCL_RT_FORMAT_R16G16_SINT
0x000000dc
-#define NVC0TCL_RT_FORMAT_R16G16_UINT
0x000000dd
-#define NVC0TCL_RT_FORMAT_R16G16_FLOAT
0x000000de
-#define NVC0TCL_RT_FORMAT_A2R10G10B10_UNORM
0x000000df
-#define NVC0TCL_RT_FORMAT_B10G11R11_FLOAT
0x000000e0
-#define NVC0TCL_RT_FORMAT_R32_FLOAT
0x000000e5
-#define NVC0TCL_RT_FORMAT_X8R8G8B8_UNORM
0x000000e6
-#define NVC0TCL_RT_FORMAT_X8R8G8B8_SRGB
0x000000e7
-#define NVC0TCL_RT_FORMAT_R5G6B5_UNORM
0x000000e8
-#define NVC0TCL_RT_FORMAT_A1R5G5B5_UNORM
0x000000e9
-#define NVC0TCL_RT_FORMAT_R8G8_UNORM
0x000000ea
-#define NVC0TCL_RT_FORMAT_R8G8_SNORM
0x000000eb
-#define NVC0TCL_RT_FORMAT_R8G8_SINT
0x000000ec
-#define NVC0TCL_RT_FORMAT_R8G8_UINT
0x000000ed
-#define NVC0TCL_RT_FORMAT_R16_UNORM
0x000000ee
-#define NVC0TCL_RT_FORMAT_R16_SNORM
0x000000ef
-#define NVC0TCL_RT_FORMAT_R16_SINT
0x000000f0
-#define NVC0TCL_RT_FORMAT_R16_UINT
0x000000f1
-#define NVC0TCL_RT_FORMAT_R16_FLOAT
0x000000f2
-#define NVC0TCL_RT_FORMAT_R8_UNORM
0x000000f3
-#define NVC0TCL_RT_FORMAT_R8_SNORM
0x000000f4
-#define NVC0TCL_RT_FORMAT_R8_SINT
0x000000f5
-#define NVC0TCL_RT_FORMAT_R8_UINT
0x000000f6
-#define NVC0TCL_RT_FORMAT_A8_UNORM
0x000000f7
-#define NVC0TCL_RT_FORMAT_X1R5G5B5_UNORM
0x000000f8
-#define NVC0TCL_RT_FORMAT_X8B8G8R8_UNORM
0x000000f9
-#define NVC0TCL_RT_FORMAT_X8B8G8R8_SRGB
0x000000fa
-#define NVC0TCL_RT_TILE_MODE(x)
(0x00000814+((x)*32))
-#define NVC0TCL_RT_TILE_MODE__SIZE
0x00000008
-#define NVC0TCL_RT_ARRAY_MODE(x)
(0x00000818+((x)*32))
-#define NVC0TCL_RT_ARRAY_MODE__SIZE
0x00000008
-#define NVC0TCL_RT_ARRAY_MODE_LAYERS_SHIFT
0
-#define NVC0TCL_RT_ARRAY_MODE_LAYERS_MASK
0x0000ffff
-#define NVC0TCL_RT_ARRAY_MODE_VOLUME
(1 << 16)
-#define NVC0TCL_RT_LAYER_STRIDE(x)
(0x0000081c+((x)*32))
-#define NVC0TCL_RT_LAYER_STRIDE__SIZE
0x00000008
-#define NVC0TCL_VIEWPORT_SCALE_X(x)
(0x00000a00+((x)*32))
-#define NVC0TCL_VIEWPORT_SCALE_X__SIZE
0x00000010
-#define NVC0TCL_VIEWPORT_SCALE_Y(x)
(0x00000a04+((x)*32))
-#define NVC0TCL_VIEWPORT_SCALE_Y__SIZE
0x00000010
-#define NVC0TCL_VIEWPORT_SCALE_Z(x)
(0x00000a08+((x)*32))
-#define NVC0TCL_VIEWPORT_SCALE_Z__SIZE
0x00000010
-#define NVC0TCL_VIEWPORT_TRANSLATE_X(x)
(0x00000a0c+((x)*32))
-#define NVC0TCL_VIEWPORT_TRANSLATE_X__SIZE
0x00000010
-#define NVC0TCL_VIEWPORT_TRANSLATE_Y(x)
(0x00000a10+((x)*32))
-#define NVC0TCL_VIEWPORT_TRANSLATE_Y__SIZE
0x00000010
-#define NVC0TCL_VIEWPORT_TRANSLATE_Z(x)
(0x00000a14+((x)*32))
-#define NVC0TCL_VIEWPORT_TRANSLATE_Z__SIZE
0x00000010
-#define NVC0TCL_VIEWPORT_HORIZ(x)
(0x00000c00+((x)*16))
-#define NVC0TCL_VIEWPORT_HORIZ__SIZE
0x00000010
-#define NVC0TCL_VIEWPORT_HORIZ_X_SHIFT
0
-#define NVC0TCL_VIEWPORT_HORIZ_X_MASK
0x0000ffff
-#define NVC0TCL_VIEWPORT_HORIZ_W_SHIFT
16
-#define NVC0TCL_VIEWPORT_HORIZ_W_MASK
0xffff0000
-#define NVC0TCL_VIEWPORT_VERT(x)
(0x00000c04+((x)*16))
-#define NVC0TCL_VIEWPORT_VERT__SIZE
0x00000010
-#define NVC0TCL_VIEWPORT_VERT_Y_SHIFT
0
-#define NVC0TCL_VIEWPORT_VERT_Y_MASK
0x0000ffff
-#define NVC0TCL_VIEWPORT_VERT_H_SHIFT
16
-#define NVC0TCL_VIEWPORT_VERT_H_MASK
0xffff0000
-#define NVC0TCL_DEPTH_RANGE_NEAR(x)
(0x00000c08+((x)*16))
-#define NVC0TCL_DEPTH_RANGE_NEAR__SIZE
0x00000010
-#define NVC0TCL_DEPTH_RANGE_FAR(x)
(0x00000c0c+((x)*16))
-#define NVC0TCL_DEPTH_RANGE_FAR__SIZE
0x00000010
-#define NVC0TCL_VIEWPORT_CLIP_HORIZ(x)
(0x00000d00+((x)*8))
-#define NVC0TCL_VIEWPORT_CLIP_HORIZ__SIZE
0x00000008
-#define NVC0TCL_VIEWPORT_CLIP_HORIZ_MIN_SHIFT
0
-#define NVC0TCL_VIEWPORT_CLIP_HORIZ_MIN_MASK
0x0000ffff
-#define NVC0TCL_VIEWPORT_CLIP_HORIZ_MAX_SHIFT
16
-#define NVC0TCL_VIEWPORT_CLIP_HORIZ_MAX_MASK
0xffff0000
-#define NVC0TCL_VIEWPORT_CLIP_VERT(x)
(0x00000d04+((x)*8))
-#define NVC0TCL_VIEWPORT_CLIP_VERT__SIZE
0x00000008
-#define NVC0TCL_VIEWPORT_CLIP_VERT_MIN_SHIFT
0
-#define NVC0TCL_VIEWPORT_CLIP_VERT_MIN_MASK
0x0000ffff
-#define NVC0TCL_VIEWPORT_CLIP_VERT_MAX_SHIFT
16
-#define NVC0TCL_VIEWPORT_CLIP_VERT_MAX_MASK
0xffff0000
-#define NVC0TCL_CLIPID_REGION_HORIZ(x)
(0x00000d40+((x)*8))
-#define NVC0TCL_CLIPID_REGION_HORIZ__SIZE
0x00000004
-#define NVC0TCL_CLIPID_REGION_VERT(x)
(0x00000d44+((x)*8))
-#define NVC0TCL_CLIPID_REGION_VERT__SIZE
0x00000004
-#define NVC0TCL_VERTEX_BUFFER_FIRST
0x00000d74
-#define NVC0TCL_VERTEX_BUFFER_COUNT
0x00000d78
-#define NVC0TCL_CLEAR_COLOR(x)
(0x00000d80+((x)*4))
-#define NVC0TCL_CLEAR_COLOR__SIZE
0x00000004
-#define NVC0TCL_CLEAR_DEPTH
0x00000d90
-#define NVC0TCL_STACK_ADDRESS_HIGH
0x00000d94
-#define NVC0TCL_STACK_ADDRESS_LOW
0x00000d98
-#define NVC0TCL_STACK_SIZE_LOG
0x00000d9c
-#define NVC0TCL_CLEAR_STENCIL
0x00000da0
-#define NVC0TCL_POLYGON_SMOOTH_ENABLE
0x00000db4
-#define NVC0TCL_POLYGON_OFFSET_POINT_ENABLE
0x00000dc0
-#define NVC0TCL_POLYGON_OFFSET_LINE_ENABLE
0x00000dc4
-#define NVC0TCL_POLYGON_OFFSET_FILL_ENABLE
0x00000dc8
-#define NVC0TCL_PATCH_VERTICES
0x00000dcc
-#define NVC0TCL_WATCHDOG_TIMER
0x00000de4
-#define NVC0TCL_WINDOW_OFFSET_X
0x00000df8
-#define NVC0TCL_WINDOW_OFFSET_Y
0x00000dfc
-#define NVC0TCL_SCISSOR_ENABLE(x)
(0x00000e00+((x)*16))
-#define NVC0TCL_SCISSOR_ENABLE__SIZE
0x00000010
-#define NVC0TCL_SCISSOR_HORIZ(x)
(0x00000e04+((x)*16))
-#define NVC0TCL_SCISSOR_HORIZ__SIZE
0x00000010
-#define NVC0TCL_SCISSOR_HORIZ_MIN_SHIFT
0
-#define NVC0TCL_SCISSOR_HORIZ_MIN_MASK
0x0000ffff
-#define NVC0TCL_SCISSOR_HORIZ_MAX_SHIFT
16
-#define NVC0TCL_SCISSOR_HORIZ_MAX_MASK
0xffff0000
-#define NVC0TCL_SCISSOR_VERT(x)
(0x00000e08+((x)*16))
-#define NVC0TCL_SCISSOR_VERT__SIZE
0x00000010
-#define NVC0TCL_SCISSOR_VERT_MIN_SHIFT
0
-#define NVC0TCL_SCISSOR_VERT_MIN_MASK
0x0000ffff
-#define NVC0TCL_SCISSOR_VERT_MAX_SHIFT
16
-#define NVC0TCL_SCISSOR_VERT_MAX_MASK
0xffff0000
-#define NVC0TCL_LOCAL_WARPS_LOG_ALLOC
0x00000f44
-#define NVC0TCL_LOCAL_WARPS_NO_CLAMP
0x00000f48
-#define NVC0TCL_STACK_WARPS_LOG_ALLOC
0x00000f4c
-#define NVC0TCL_STACK_WARPS_NO_CLAMP
0x00000f50
-#define NVC0TCL_STENCIL_BACK_FUNC_REF
0x00000f54
-#define NVC0TCL_STENCIL_BACK_MASK
0x00000f58
-#define NVC0TCL_STENCIL_BACK_FUNC_MASK
0x00000f5c
-#define NVC0TCL_VERTEX_RUNOUT_HIGH
0x00000f84
-#define NVC0TCL_VERTEX_RUNOUT_LOW
0x00000f88
-#define NVC0TCL_DEPTH_BOUNDS(x)
(0x00000f9c+((x)*4))
-#define NVC0TCL_DEPTH_BOUNDS__SIZE
0x00000002
-#define NVC0TCL_MSAA_MASK(x)
(0x00000fbc+((x)*4))
-#define NVC0TCL_MSAA_MASK__SIZE
0x00000004
-#define NVC0TCL_CLIPID_ADDRESS_HIGH
0x00000fcc
-#define NVC0TCL_CLIPID_ADDRESS_LOW
0x00000fd0
-#define NVC0TCL_ZETA_ADDRESS_HIGH
0x00000fe0
-#define NVC0TCL_ZETA_ADDRESS_LOW
0x00000fe4
-#define NVC0TCL_ZETA_FORMAT
0x00000fe8
-#define NVC0TCL_ZETA_FORMAT_Z32_FLOAT
0x0000000a
-#define NVC0TCL_ZETA_FORMAT_Z16_UNORM
0x00000013
-#define NVC0TCL_ZETA_FORMAT_Z24S8_UNORM
0x00000014
-#define NVC0TCL_ZETA_FORMAT_X8Z24_UNORM
0x00000015
-#define NVC0TCL_ZETA_FORMAT_S8Z24_UNORM
0x00000016
-#define NVC0TCL_ZETA_FORMAT_Z32_FLOAT_X24S8_UNORM
0x00000019
-#define NVC0TCL_ZETA_TILE_MODE
0x00000fec
-#define NVC0TCL_ZETA_LAYER_STRIDE
0x00000ff0
-#define NVC0TCL_SCREEN_SCISSOR_HORIZ
0x00000ff4
-#define NVC0TCL_SCREEN_SCISSOR_HORIZ_W_SHIFT
16
-#define NVC0TCL_SCREEN_SCISSOR_HORIZ_W_MASK
0xffff0000
-#define NVC0TCL_SCREEN_SCISSOR_HORIZ_X_SHIFT
0
-#define NVC0TCL_SCREEN_SCISSOR_HORIZ_X_MASK
0x0000ffff
-#define NVC0TCL_SCREEN_SCISSOR_VERT
0x00000ff8
-#define NVC0TCL_SCREEN_SCISSOR_VERT_H_SHIFT
16
-#define NVC0TCL_SCREEN_SCISSOR_VERT_H_MASK
0xffff0000
-#define NVC0TCL_SCREEN_SCISSOR_VERT_Y_SHIFT
0
-#define NVC0TCL_SCREEN_SCISSOR_VERT_Y_MASK
0x0000ffff
-#define NVC0TCL_VTX_ATTR_DEFINE
0x0000114c
-#define NVC0TCL_VTX_ATTR_DEFINE_ATTR_SHIFT
0
-#define NVC0TCL_VTX_ATTR_DEFINE_ATTR_MASK
0x0000003f
-#define NVC0TCL_VTX_ATTR_DEFINE_COMP_SHIFT
8
-#define NVC0TCL_VTX_ATTR_DEFINE_COMP_MASK
0x00000f00
-#define NVC0TCL_VTX_ATTR_DEFINE_SIZE_SHIFT
12
-#define NVC0TCL_VTX_ATTR_DEFINE_SIZE_MASK
0x0000f000
-#define NVC0TCL_VTX_ATTR_DEFINE_TYPE_SHIFT
16
-#define NVC0TCL_VTX_ATTR_DEFINE_TYPE_MASK
0x000f0000
-#define NVC0TCL_VTX_ATTR_DEFINE_TYPE_FLOAT
0x00070000
-#define NVC0TCL_VTX_ATTR_DEFINE_TYPE_UNORM
0x00010000
-#define NVC0TCL_VTX_ATTR_DEFINE_TYPE_SNORM
0x00020000
-#define NVC0TCL_VTX_ATTR_DEFINE_TYPE_USCALED
0x00050000
-#define NVC0TCL_VTX_ATTR_DEFINE_TYPE_SSCALED
0x00060000
-#define NVC0TCL_VTX_ATTR_DEFINE_TYPE_UINT
0x00040000
-#define NVC0TCL_VTX_ATTR_DEFINE_TYPE_SINT
0x00030000
-#define NVC0TCL_VTX_ATTR_DATA(x)
(0x00001150+((x)*4))
-#define NVC0TCL_VTX_ATTR_DATA__SIZE
0x00000004
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT(x)
(0x00001160+((x)*4))
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT__SIZE
0x00000020
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_BUFFER_SHIFT
0
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_BUFFER_MASK
0x0000003f
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_CONST
(1 << 6)
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_OFFSET_SHIFT
7
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_OFFSET_MASK
0x001fff80
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_SHIFT
21
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_MASK
0x07e00000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_32_32_32_32
0x00200000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_32_32_32
0x00400000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_16_16_16_16
0x00600000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_32_32
0x00800000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_16_16_16
0x00a00000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_8_8_8_8
0x01400000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_16_16
0x01e00000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_32
0x02400000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_8_8_8
0x02600000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_8_8
0x03000000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_16
0x03600000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_8
0x03a00000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_FORMAT_2_10_10_10
0x06000000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_TYPE_SHIFT
27
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_TYPE_MASK
0x78000000
-#define NVC0TCL_VERTEX_ATTRIB_FORMAT_TYPE_FLOAT
0x38000000
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