debian/changelog | 10 ++++++++++
include/drm/i915_drm.h | 8 +++++++-
intel/intel_bufmgr_gem.c | 40 +++++++++++++++++++++++++++++++++-------
3 files changed, 50 insertions(+), 8 deletions(-)
New commits:
commit 2589d4b9c64fb34dbcd4b0d815806b4fd2731b16
Author: Cyril Brulebois <k...@debian.org>
Date: Sun Nov 7 22:51:31 2010 +0100
Upload to experimental.
diff --git a/debian/changelog b/debian/changelog
index 8c05b22..40aaf55 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,4 +1,4 @@
-libdrm (2.4.22-2) UNRELEASED; urgency=low
+libdrm (2.4.22-2) experimental; urgency=low
* Cherry-pick some commits from upstream to make the intel video driver
2.13.901 buildable:
@@ -6,7 +6,7 @@ libdrm (2.4.22-2) UNRELEASED; urgency=low
- 36245771: intel: enable relaxed fence allocation for i915
- 49447a9b: intel: initialize bufmgr.bo_mrb_exec unconditionally
- -- Cyril Brulebois <k...@debian.org> Sun, 07 Nov 2010 22:41:56 +0100
+ -- Cyril Brulebois <k...@debian.org> Sun, 07 Nov 2010 22:51:12 +0100
libdrm (2.4.22-1) experimental; urgency=low
commit bb47f01566c9bb6c73d99b3649cf617366ccd941
Author: Cyril Brulebois <k...@debian.org>
Date: Sun Nov 7 22:47:37 2010 +0100
Document the cherry-pick.
diff --git a/debian/changelog b/debian/changelog
index 3f87190..8c05b22 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,13 @@
+libdrm (2.4.22-2) UNRELEASED; urgency=low
+
+ * Cherry-pick some commits from upstream to make the intel video driver
+ 2.13.901 buildable:
+ - 057fab33: intel: Prepare for BLT ring split
+ - 36245771: intel: enable relaxed fence allocation for i915
+ - 49447a9b: intel: initialize bufmgr.bo_mrb_exec unconditionally
+
+ -- Cyril Brulebois <k...@debian.org> Sun, 07 Nov 2010 22:41:56 +0100
+
libdrm (2.4.22-1) experimental; urgency=low
[ Sven Joachim ]
commit afce75cb0902190c35627ecfdc14da2fb545dd3a
Author: Albert Damen <al...@gmx.net>
Date: Sun Nov 7 15:54:32 2010 +0100
intel: initialize bufmgr.bo_mrb_exec unconditionally
If bufmgr.bo_mrb_exec is not set, drm_intel_bo_mrb_exec returns ENODEV
even though drm_intel_gem_bo_mrb_exec2 will work fine for the RENDER ring.
Fixes xf86-video-intel after commit 'add BLT ring support' (5bed685f76)
with kernels without BSD or BLT ring support (2.6.34 and before).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31443
Signed-off-by: Albert Damen <al...@gmx.net>
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
(cherry picked from commit 49447a9b957047db2549b8a929e763bbd87808ba)
Signed-off-by: Cyril Brulebois <k...@debian.org>
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 56e0183..7aff867 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -2201,8 +2201,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
/* Use the new one if available */
if (exec2) {
bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec2;
- if (bufmgr_gem->has_bsd|bufmgr_gem->has_blt)
- bufmgr_gem->bufmgr.bo_mrb_exec =
drm_intel_gem_bo_mrb_exec2;
+ bufmgr_gem->bufmgr.bo_mrb_exec = drm_intel_gem_bo_mrb_exec2;
} else
bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec;
bufmgr_gem->bufmgr.bo_busy = drm_intel_gem_bo_busy;
commit ef3a6654bee1aa76a2b95b0a2c7653230537e00c
Author: Chris Wilson <ch...@chris-wilson.co.uk>
Date: Fri Oct 29 10:49:54 2010 +0100
intel: enable relaxed fence allocation for i915
The kernel has always allowed userspace to underallocate objects
supplied for fencing. However, the kernel only allocated the object size
for the fence in the GTT and so caused tiling corruption. More recently
the kernel does allocate the full fence region in the GTT for an
under-sized object and so advertises that clients may finally make use
of this feature. The biggest benefit is for texture-heavy GL games on
i945 such as World of Padman which go from needing over 1GiB of RAM to
play to fitting in the GTT!
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
(cherry picked from commit 362457715faacd3101929e5f0d8ae250d0ad09df)
Signed-off-by: Cyril Brulebois <k...@debian.org>
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index bd93061..19da2c0 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -278,6 +278,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_HAS_EXECBUF2 9
#define I915_PARAM_HAS_BSD 10
#define I915_PARAM_HAS_BLT 11
+#define I915_PARAM_HAS_RELAXED_FENCING 12
typedef struct drm_i915_getparam {
int param;
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 161a007..56e0183 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -99,9 +99,10 @@ typedef struct _drm_intel_bufmgr_gem {
int available_fences;
int pci_device;
int gen;
- char has_bsd;
- char has_blt;
- char bo_reuse;
+ unsigned int has_bsd : 1;
+ unsigned int has_blt : 1;
+ unsigned int has_relaxed_fencing : 1;
+ unsigned int bo_reuse : 1;
char fenced_relocs;
} drm_intel_bufmgr_gem;
@@ -243,6 +244,10 @@ drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem
*bufmgr_gem, unsigned long size,
return size;
}
+ /* Do we need to allocate every page for the fence? */
+ if (bufmgr_gem->has_relaxed_fencing)
+ return ROUND_UP_TO(size, 4096);
+
for (i = min_size; i < size; i <<= 1)
;
@@ -2137,6 +2142,10 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
bufmgr_gem->has_blt = ret == 0;
+ gp.param = I915_PARAM_HAS_RELAXED_FENCING;
+ ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ bufmgr_gem->has_relaxed_fencing = ret == 0;
+
if (bufmgr_gem->gen < 4) {
gp.param = I915_PARAM_NUM_FENCES_AVAIL;
gp.value = &bufmgr_gem->available_fences;
commit fce8b79a889cebe9be38a4a07846383dd1d9fa24
Author: Chris Wilson <ch...@chris-wilson.co.uk>
Date: Tue Oct 26 11:35:11 2010 +0100
intel: Prepare for BLT ring split.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
(cherry picked from commit 057fab3382c02af54126ce395c43d4e6dce9439a)
Signed-off-by: Cyril Brulebois <k...@debian.org>
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 7594413..bd93061 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -206,6 +206,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE +
DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE +
DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE +
DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
+#define DRM_IOCTL_I915_HWS_ADDR DRM_IOW(DRM_COMMAND_BASE +
DRM_I915_HWS_ADDR, struct drm_i915_gem_init)
#define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE +
DRM_I915_GEM_INIT, struct drm_i915_gem_init)
#define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE +
DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer)
#define DRM_IOCTL_I915_GEM_EXECBUFFER2 DRM_IOW(DRM_COMMAND_BASE +
DRM_I915_GEM_EXECBUFFER2, struct drm_i915_gem_execbuffer2)
@@ -276,6 +277,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_HAS_PAGEFLIPPING 8
#define I915_PARAM_HAS_EXECBUF2 9
#define I915_PARAM_HAS_BSD 10
+#define I915_PARAM_HAS_BLT 11
typedef struct drm_i915_getparam {
int param;
@@ -617,8 +619,11 @@ struct drm_i915_gem_execbuffer2 {
__u32 num_cliprects;
/** This is a struct drm_clip_rect *cliprects */
__u64 cliprects_ptr;
+#define I915_EXEC_RING_MASK (7<<0)
+#define I915_EXEC_DEFAULT (0<<0)
#define I915_EXEC_RENDER (1<<0)
-#define I915_EXEC_BSD (1<<1)
+#define I915_EXEC_BSD (2<<0)
+#define I915_EXEC_BLT (3<<0)
__u64 flags;
__u64 rsvd1;
__u64 rsvd2;
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 968cb78..161a007 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -99,6 +99,8 @@ typedef struct _drm_intel_bufmgr_gem {
int available_fences;
int pci_device;
int gen;
+ char has_bsd;
+ char has_blt;
char bo_reuse;
char fenced_relocs;
} drm_intel_bufmgr_gem;
@@ -1553,8 +1555,21 @@ drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used,
struct drm_i915_gem_execbuffer2 execbuf;
int ret, i;
- if ((ring_flag != I915_EXEC_RENDER) && (ring_flag != I915_EXEC_BSD))
+ switch (ring_flag) {
+ default:
return -EINVAL;
+ case I915_EXEC_BLT:
+ if (!bufmgr_gem->has_blt)
+ return -EINVAL;
+ break;
+ case I915_EXEC_BSD:
+ if (!bufmgr_gem->has_bsd)
+ return -EINVAL;
+ break;
+ case I915_EXEC_RENDER:
+ case I915_EXEC_DEFAULT:
+ break;
+ }
pthread_mutex_lock(&bufmgr_gem->lock);
/* Update indices and set up the validate list. */
@@ -2063,7 +2078,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
struct drm_i915_gem_get_aperture aperture;
drm_i915_getparam_t gp;
int ret;
- int exec2 = 0, has_bsd = 0;
+ int exec2 = 0;
bufmgr_gem = calloc(1, sizeof(*bufmgr_gem));
if (bufmgr_gem == NULL)
@@ -2116,8 +2131,11 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
gp.param = I915_PARAM_HAS_BSD;
ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
- if (!ret)
- has_bsd = 1;
+ bufmgr_gem->has_bsd = ret == 0;
+
+ gp.param = I915_PARAM_HAS_BLT;
+ ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ bufmgr_gem->has_blt = ret == 0;
if (bufmgr_gem->gen < 4) {
gp.param = I915_PARAM_NUM_FENCES_AVAIL;
@@ -2174,7 +2192,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
/* Use the new one if available */
if (exec2) {
bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec2;
- if (has_bsd)
+ if (bufmgr_gem->has_bsd|bufmgr_gem->has_blt)
bufmgr_gem->bufmgr.bo_mrb_exec =
drm_intel_gem_bo_mrb_exec2;
} else
bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec;
--
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