On 8/31/2013 10:00 AM, Richard Owlett wrote: > Especially as I explicitly emphasized wanting to know bus width.
I find it curious Richard that you emphasize this, given that the "CPU bus width" in isolation is meaningless. Every x86 CPU since the original Pentium that shipped in 1993, up to the Opteron which shipped in 2003, had a 64 bit wide data bus, clocked from 66 to 266MHz, including double/quad pumped buses. Throughput has varied from the first to the last model from 528MB/s to 8.5GB/s. In the post Opteron era the memory buses are decoupled from the system interconnect, the latter no longer being a bus but a apir of bidirectional point-point serial links. Modern CPUs have 2 to 4x 64bit wide memory buses clocked at up to 1600 MHz, for a combined DRAM bandwidth of 25.6 to 51.2GB/s. The system interconnect links, HyperTransport in the case of AMD CPUs, provide from 3.2GB/s to 12.8GB/s one way. On CPUs shipped since 2003 in the case of AMD, later for Intel, there is no singular "bus width". There are 2, 3, or 4 memory buses, and a system interconnect, all clocked at different speeds on different vendor models. So I fail to see why your knowing the "CPU bus width" is relevant to anything. -- Stan -- To UNSUBSCRIBE, email to debian-user-requ...@lists.debian.org with a subject of "unsubscribe". Trouble? Contact listmas...@lists.debian.org Archive: http://lists.debian.org/52231789.3040...@hardwarefreak.com
