> Has anyone ever come up with a more or less clean patch for that? Would > that be sane default behaviour, or should it only be enabled by an > option?
I'd say add an option "UseFWPLL" or something like that. When set, probe the value of PPLL_REF_DIV and PPLL_DIV_n (where n is whatever PPLL is selected in CLOCK_CNTL_INDEX low byte). Then, set the existing: - info->UseBiosDividers = 1; - info->RefDivider (whatever is in PPLL_REF_DIV) - info->FeedbackDivider = (PPLL_DIV_n & 0xffff); - info->PostDivider = (PPLL_DIV_n >> 16); Once that's set, the driver will use the existing x86 "BIOS divider" bypass when setting mode and will use those values. Ben.
