On 7 Apr, this message from Peter Cordes echoed through cyberspace: > Now that I think about it again, maybe the problem is just that the L2 > cache is on the mobo, as well as being shared, so the CPUs have to go > through the bottleneck bus to get to it.
Yeah, nothing like a backside cache, these ancient bus-attached caches... 64 bit @ 50 MHz isn't fast, is it? >> But the worst part is that the >> 604e is but a very pale shadow of the 604, with it's half wide data >> and address busses and basically non-existent L1 caches. It's >> specmark numbers for a 200 are below those of a 200MHz PentiumPro. Andrew, you're sure you're not confusing with the 603e here? The 604e was, AFAIR, a beefed-up version of the 604 (with _larger_ L1 caches, 2x32k vs. 2x16k)... Also, the 603e is not multiprocessor capable, except maybe with some horrible external glue & arbitration logic... Cheers Michel ------------------------------------------------------------------------- Michel Lanners | " Read Philosophy. Study Art. 23, Rue Paul Henkes | Ask Questions. Make Mistakes. L-1710 Luxembourg | email [EMAIL PROTECTED] | http://www.cpu.lu/~mlan | Learn Always. "
