Takehiko Abe wrote:
> 
> Michel Lanners wrote:
> 
> > Try putting your Fireball on a different ID. This was FAQ a very long
> > time ago when MkLinux started supporting the 7/8/9x00 PCI-based
> > machines... Nobody ever came up with any sort of explanation, but moving
> > the disk to a different SCSI ID helped most of the time.
> 
> Unfortunately my fireball HD won't work unless it is set to id=0,
> that is, MacOS won't startup at all. I guess I've got a lemon
> --Quantum Fireball 1080S (Apple branded).
> 
> I already tried various id combinations, different orders in the
> chain and even termination in the middle. all in vain. Irritating
> part is that debian does recognize it once in a few boots and gives
> me a kernel panic. It seems to occur randomly.
> 
> I'm going to swith it from mesh to 53C94 (I need to get cable
> first.)

You may try the following patch. It worked for me.

Regards,
-velco

--- 8< ---
diff -u -r -X exclude linux-2.3-linus/drivers/scsi/mesh.c
linux-2.3/drivers/scsi/mesh.c
--- linux-2.3-linus/drivers/scsi/mesh.c Wed Sep  8 14:51:22 1999
+++ linux-2.3/drivers/scsi/mesh.c       Thu Oct 28 23:27:40 1999
@@ -485,25 +479,17 @@
 
        udelay(100);
 
-       out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16);   /* stop dma */
-       out_8(&mr->exception, 0xff);    /* clear all exception bits */
-       out_8(&mr->error, 0xff);        /* clear all error bits */
+       out_8(&mr->exception, 0xff);    
+       out_8(&mr->error, 0xff);        
        out_8(&mr->sequence, SEQ_RESETMESH);
        udelay(10);
+
+       out_8(&mr->interrupt, 0xff);    /* clear all interrupt bits */
        out_8(&mr->intr_mask, INT_ERROR | INT_EXCEPTION | INT_CMDDONE);
        out_8(&mr->source_id, ms->host->this_id);
        out_8(&mr->sel_timeout, 25);    /* 250ms */
-       out_8(&mr->sync_params, ASYNC_PARAMS);
-
-       out_8(&mr->bus_status1, BS1_RST);       /* assert RST */
-       udelay(30);                     /* leave it on for >= 25us */
-       out_8(&mr->bus_status1, 0);     /* negate RST */
-
-       out_8(&mr->sequence, SEQ_FLUSHFIFO);
-       udelay(1);
-       out_8(&mr->sync_params, ASYNC_PARAMS);
-       out_8(&mr->sequence, SEQ_ENBRESEL);
-       out_8(&mr->interrupt, 0xff);    /* clear all interrupt bits */
+       out_8(&mr->sync_params, ASYNC_PARAMS);  /* asynchronous initially */
+       out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
 }
 
 /*
--- 8< ---

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