Hi Lennert, Lennert Buytenhek <buyt...@wantstofly.org> writes: > The problem here was that the Marvell PHY driver at some point supported > one or two specific Marvell ethernet PHY models, and people then started > blindly adding new PHY IDs to it without checking whether the already > supported PHYs and the PHYs for which support was being added had common > register layouts (and they didn't). > > The result is that on some of the very common Marvell PHYs that this > driver claims to support, the driver does sequences of register writes > that have entirely different effects than the intended ones, causing > various unintended side effects, including complete link failure, and > e.g. on the quad ethernet PHY on some of the mv78xx0 development > boards, having the Marvell PHY driver enabled causes link to flap on > the other three ports if you plug/unplug one of the ports because the > driver thinks it's a good idea to hard reset the whole chip under > these circumstances... > > What needs to be done is that someone with access to the relevant > Marvell datasheets fix the driver to behave according to which chip > it's being used on. It's quite a bit of work to sort out this mess, > easily several tens of hours -- I started looking into it when I was > still at Marvell, but didn't get it done before leaving. Thanks for clarifying. This sounds like it would not be a wise choice to enable this option again :-(.
Does anyone have an idea about what we can do to make the marvell module available to those who need it, without breaking the rest? Maybe offer it in a separate package? -- Best regards, Michael -- To UNSUBSCRIBE, email to debian-kernel-requ...@lists.debian.org with a subject of "unsubscribe". Trouble? Contact listmas...@lists.debian.org Archive: http://lists.debian.org/x67gc7fl3a....@midna.lan
