On Wed, Nov 05, 2008 at 02:50:32PM +0100, Bastian Blank wrote:
> On Wed, Nov 05, 2008 at 01:10:30PM +0000, Ian Campbell wrote:
> > On Wed, 2008-11-05 at 10:05 +0000, Ian Campbell wrote:
> > > > What happens if you use "nopat" to disable the usage of PAT?
> > > CONFIG_X86_PAT is disabled anyway so it makes no difference.
> > Although it does turn out that PAT is implicated...
> Ah.
Shorter patch. Tries to use the compiler instead of the preprocessor.
Bastian
--
Change is the essential process of all existence.
-- Spock, "Let That Be Your Last Battlefield", stardate 5730.2
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 170d743..ae1e15b 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1141,6 +1141,7 @@ config X86_PAT
bool
prompt "x86 PAT support"
depends on MTRR
+ depends on !XEN
help
Use PAT attributes to setup page level cache control.
diff --git a/arch/x86/mm/ioremap-xen.c b/arch/x86/mm/ioremap-xen.c
index 95c214f..93fc6f7 100644
--- a/arch/x86/mm/ioremap-xen.c
+++ b/arch/x86/mm/ioremap-xen.c
@@ -255,9 +255,11 @@ int ioremap_change_attr(unsigned long vaddr, unsigned long
size,
default:
err = _set_memory_uc(vaddr, nrpages);
break;
+#ifdef CONFIG_X86_PAT
case _PAGE_CACHE_WC:
err = _set_memory_wc(vaddr, nrpages);
break;
+#endif
case _PAGE_CACHE_WB:
err = _set_memory_wb(vaddr, nrpages);
break;
@@ -340,11 +342,17 @@ static void __iomem *__ioremap_caller(resource_size_t
phys_addr,
* - request is uc-, return cannot be write-combine
* - request is write-combine, return cannot be write-back
*/
- if ((prot_val == _PAGE_CACHE_UC_MINUS &&
+ if (
+#ifdef CONFIG_X86_PAT
+ (prot_val == _PAGE_CACHE_UC_MINUS &&
(new_prot_val == _PAGE_CACHE_WB ||
new_prot_val == _PAGE_CACHE_WC)) ||
(prot_val == _PAGE_CACHE_WC &&
- new_prot_val == _PAGE_CACHE_WB)) {
+ new_prot_val == _PAGE_CACHE_WB)
+#else
+ (prot_val == _PAGE_CACHE_UC_MINUS && new_prot_val ==
_PAGE_CACHE_WB)
+#endif
+ ) {
pr_debug(
"ioremap error for 0x%llx-0x%llx, requested 0x%lx, got 0x%lx\n",
(unsigned long long)phys_addr,
@@ -364,9 +372,11 @@ static void __iomem *__ioremap_caller(resource_size_t
phys_addr,
case _PAGE_CACHE_UC_MINUS:
prot = PAGE_KERNEL_UC_MINUS;
break;
+#ifdef CONFIG_X86_PAT
case _PAGE_CACHE_WC:
prot = PAGE_KERNEL_WC;
break;
+#endif
case _PAGE_CACHE_WB:
prot = PAGE_KERNEL;
break;
diff --git a/arch/x86/mm/pat-xen.c b/arch/x86/mm/pat-xen.c
index 6fc94ce..52f9776 100644
--- a/arch/x86/mm/pat-xen.c
+++ b/arch/x86/mm/pat-xen.c
@@ -116,9 +116,11 @@ static char *cattr_name(unsigned long flags)
case _PAGE_CACHE_UC: return "uncached";
case _PAGE_CACHE_UC_MINUS: return "uncached-minus";
case _PAGE_CACHE_WB: return "write-back";
+#ifdef CONFIG_X86_PAT
case _PAGE_CACHE_WC: return "write-combining";
case _PAGE_CACHE_WP: return "write-protected";
case _PAGE_CACHE_WT: return "write-through";
+#endif
default: return "broken";
}
}
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 10fb308..5908a06 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -324,10 +324,16 @@ int pci_mmap_page_range(struct pci_dev *dev, struct
vm_area_struct *vma,
* - request is uncached, return cannot be write-combine
* - request is write-combine, return cannot be write-back
*/
+#ifdef CONFIG_X86_PAT
if ((flags == _PAGE_CACHE_UC_MINUS &&
(new_flags == _PAGE_CACHE_WB)) ||
(flags == _PAGE_CACHE_WC &&
- new_flags == _PAGE_CACHE_WB)) {
+ new_flags == _PAGE_CACHE_WB))
+#else
+ if (flags == _PAGE_CACHE_UC_MINUS &&
+ new_flags == _PAGE_CACHE_WB)
+#endif
+ {
free_memtype(addr, addr+len);
return -EINVAL;
}
diff --git a/include/asm-x86/mach-xen/asm/pgtable.h
b/include/asm-x86/mach-xen/asm/pgtable.h
index a9ff073..73ec9f3 100644
--- a/include/asm-x86/mach-xen/asm/pgtable.h
+++ b/include/asm-x86/mach-xen/asm/pgtable.h
@@ -74,11 +74,17 @@ extern unsigned int __kernel_page_user;
* PAT settings are part of the hypervisor interface, which sets the
* MSR to 0x050100070406 (i.e. WB, WT, UC-, UC, WC, WP [, UC, UC]).
*/
-#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT | _PAGE_PAT)
+#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
#define _PAGE_CACHE_WB (0)
+#ifdef CONFIG_X86_PAT
#define _PAGE_CACHE_WT (_PAGE_PWT)
#define _PAGE_CACHE_WC (_PAGE_PAT)
#define _PAGE_CACHE_WP (_PAGE_PAT | _PAGE_PWT)
+#else
+#define _PAGE_CACHE_WT (0)
+#define _PAGE_CACHE_WC (0)
+#define _PAGE_CACHE_WP (0)
+#endif
#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
