All over campus, Stanford has eagerly embraced the "grand challenges" of 
nanotechnology. Just this April, the Stanford Nanofabrication Facility (SNF) hosted an 
open house to celebrate its selection to be part of the National Science 
Foundation-sponsored National Nanotechnology Infrastructure Network sprawling across 
thirteen universities nationwide. Along with the new Nanocharacterization Laboratory 
expanding the SNF, the nearly finished Manoharan lab that Stanford students bike past on 
the way to physics lab embodies the prominent place nanotechnology has in Stanford 
research for years to come. Specifically, the Manoharan lab is equipped to manipulate 
matter on an atomic level. Here's a cross-section of nanotechnology research currently 
being pursued at Stanford:

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In other applications of carbon nanotubes, Dai has Professor Michael McGehee is 
developing cheap and efficient nanostructured solar cells.
All over campus, Stanford has eagerly embraced the "grand challenges" of 
nanotechnology. Just this April, the Stanford Nanofabrication Facility (SNF) hosted an 
open house to celebrate its selection to be part of the National Science 
Foundation-sponsored National Nanotechnology Infrastructure Network sprawling across 
thirteen universities nationwide. Along with the new Nanocharacterization Laboratory 
expanding the SNF, the nearly finished Manoharan lab that Stanford students bike past on 
the way to physics lab embodies the prominent place nanotechnology has in Stanford 
research for years to come. Specifically, the Manoharan lab is equipped to manipulate 
matter on an atomic level. Here's a cross-section of nanotechnology research currently 
being pursued at Stanford:
Currently, the gate length, the characteristic length parameter in transistors, 
has hit about 90 nm. The shorter the gate length, the faster transistors can 
switch on and off. In fact, the transistors have gotten so fast, that the delay 
as electrons flow through the skinnier and longer wires needed to cross larger, 
complex chips is on track to become the limiting factora in speed. This delay 
is just one of the fundamental problems that threatens to make the nanoscale 
regime of electronics unfaithful to Moore's Law and demands the design of new 
materials and structures or a complete shift in chip architecture.





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