------- Comment #9 from ebotcazou at gcc dot gnu dot org 2007-11-24 20:31
-------
> This probably means I don't have the change quite right. I also have a
> problem with paradoxical SUBREGS when the inner register is spilled. I'm
> not clear on how this is to be handled on a big endian target with strict
> alignment. The documentation says reload is supposed to prevent this from
> happening, but it doesn't seem to. I see this with the testcase from this
> PR. It's combine that creates the paradoxical SUBREG.
Here is how the SPARC port deals with this specific case:
/* Return the register class of a scratch register needed to load IN into
a register of class CLASS in MODE.
We need a temporary when loading/storing a HImode/QImode value
between memory and the FPU registers. This can happen when combine puts
a paradoxical subreg in a float/fix conversion insn.
We need a temporary when loading/storing a DFmode value between
unaligned memory and the upper FPU registers. */
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
[...]
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, IN) \
--
ebotcazou at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |ebotcazou at gcc dot gnu dot
| |org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34091
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