Bruce Perens <[EMAIL PROTECTED]> writes: > Hamish Moffatt wrote: > > >Manufacturing an ASIC involves NRE (non-recurring engineering) costs of > >hundreds of thousands to millions per revision. > > > If you haven't looked at OpenCores.org yet, please do so to get an > idea of how far they have been able to carry this so far. > > I have priced this out as far as getting a chip through MOSIS, which > is the step just before you'd go to full-wafer fabrication. Presumably > you'd use the same process in MOSIS that you'd use for > full-wafer. What I don't understand yet is the mask fabrication cost > for full-wafer,
These days, about a million bucks per layer for 90 nm technology. > and what it costs to do fabrication runs once you have the mask. This is highly volume dependent. If you're serious about manufacturing small series of chips, you should be looking at laser or electron-beam lithography. This obviates the needs for masks, lowering NRE costs. The downsides is that it is slower to manufacture and more expensive when large series are involved. That's probably what MOSIS is using. Phil.
