Hi,
On Sun, Dec 7, 2008 at 14:21, Thiemo Seufer <[EMAIL PROTECTED]> wrote:
>> as -o tas.o tas.s
>> tas.s: Assembler messages:
>> tas.s:10: Error: illegal operands `ori t1,zero,12345'
>> tas.s:11: Error: opcode not supported on this processor: mips1 (mips1) `ll
>> t0,(a0)'
>> tas.s:12: Error: opcode not supported on this processor: mips1 (mips1) `sc
>> t1,(a0)'
>> tas.s:13: Error: illegal operands `beq t1,zero,1b'
>> tas.s:17: Error: illegal operands `or v0,t0,zero'
> The package failed to build on most architectures in different ways. The
> appended patch fixes the build failure on mips (and presumably mipsel).
In addition to this problem, I failed to see before that drawterm
can't build on most architectures, since it is hardcoded to work only
in i386, amd64, powerpc, sparc and mips. In fact, the only relevant
code is a lock operation (tas) and a mechanism to get the program
counter for the caller of a function (getcallerpc), both of which
could be completely replaced by gcc builtin extensions
(__sync_val_compare_and_swap and __builtin_return_address(0)), so I'm
trying to solve this bug and #508100 by replacing completely the
arch-specific code.
Could you tell me if the assembler code generated by gcc looks as a
reasonable replacement for the offending code you've patched?
$ objdump -S posix-mips/tas.o
posix-mips/tas.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <tas>:
#include "u.h"
#include "libc.h"
int
tas(long *x)
{
0: 3c1c0000 lui gp,0x0
4: 27bdffe0 addiu sp,sp,-32
8: 279c0000 addiu gp,gp,0
c: afbf001c sw ra,28(sp)
10: afbc0010 sw gp,16(sp)
int v;
v = __sync_val_compare_and_swap(x, 0, 1);
14: 0000000f 0xf
18: c0820000 lwc0 $2,0(a0)
1c: 14400004 bnez v0,30 <tas+0x30>
20: 24010001 li at,1
24: e0810000 swc0 $1,0(a0)
28: 1020fffb beqz at,18 <tas+0x18>
2c: 00000000 nop
30: 0000000f 0xf
switch(v) {
34: 2c430002 sltiu v1,v0,2
38: 14600007 bnez v1,58 <tas+0x58>
3c: 00402821 move a1,v0
case 0:
case 1:
return v;
default:
print("canlock: corrupted 0x%lux\n", v);
40: 8f990000 lw t9,0(gp)
44: 3c040000 lui a0,0x0
48: 0320f809 jalr t9
4c: 24840000 addiu a0,a0,0
50: 8fbc0010 lw gp,16(sp)
54: 24020001 li v0,1
return 1;
}
}
58: 8fbf001c lw ra,28(sp)
5c: 00000000 nop
60: 03e00008 jr ra
64: 27bd0020 addiu sp,sp,32
...
Thanks for your report and patch.
--
Martín Ferrari
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