On Fre, 2011-08-26 at 10:42 +0100, Martin wrote: > On Thu, 2011-08-25 at 11:08 +0200, Michel Dänzer wrote: > > On Don, 2011-08-25 at 09:50 +0100, Martin wrote: > > > On Wed, 2011-08-24 at 08:50 +0200, Michel Dänzer wrote: > > > > > > > > Can you try if the hangs in X happen when the psmouse module is never > > > > loaded in the first place? > > > > > > So I've tried the following: > > > > > > 1. Boot from a Debian 4.0 install CD to clear the non-volatile fault. > > > > > > 2. Boot from a Debian 6.0 install CD to blacklist psmouse without > > > loading it. > > > > > > 3. Reboot the system and let X start. > > > > > > 4. Log in via SSH and run four separate loops, each of which starts a > > > set of programs, sleeps for a prime amount of time, kills them and sleep > > > for another prime amount of time. One loop ran five xterms, one ran two > > > glxgears (one fullscreen) and one ran twenty xeyes while the final loop > > > ran a fulscreen mplayer. When I have run this kind of load > > > interactively it hangs the machine within 20-30 minutes, run via SSH it > > > ran stably for over 12 hours. > > > > > > Thus I conclude that the thing that triggers the bug is dependent on > > > psmouse or (inclusive-or) interactive use of the machine via keyboard > > > and mouse. > > > > It's important to make the distinction between these possibilities > > though: > > > > Can you still trigger the hang moving the mouse interactively (e.g. with > > a USB mouse) when psmouse was never loaded? > > With no psmouse module and a USB mouse I can still trigger the fault, > althought it takes longer, i.e. 20 minutes to 1/2 hour.
So that rules out the psmouse module being repsonsible for the hangs in X. > > If yes, does Option "SWcursor" in xorg.conf work around the problem? > > (Verify in Xorg.0.log that the option takes effect) > > I've set this and so far it seems to have helped. I used the machine > interactively for 20 minutes or so and left it running loops starting > programs overnight. I should hopefully have more time to use it over > the next few days and will report back. If the hangs don't occur with SW cursor, the attached kernel patch might help for HW cursor with KMS. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Debian, X and DRI developer
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c index 3189a7e..5244020 100644 --- a/drivers/gpu/drm/radeon/radeon_cursor.c +++ b/drivers/gpu/drm/radeon/radeon_cursor.c @@ -51,12 +51,13 @@ static void radeon_lock_cursor(struct drm_crtc *crtc, bool lock) cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK; WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); } else { - cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); + WREG32(RADEON_MM_INDEX, RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); + cur_lock = RREG32(RADEON_MM_DATA); if (lock) cur_lock |= RADEON_CUR_LOCK; else cur_lock &= ~RADEON_CUR_LOCK; - WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock); + WREG32(RADEON_MM_DATA, cur_lock); } } @@ -140,7 +141,8 @@ static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj, } else { radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; /* offset is from DISP(2)_BASE_ADDRESS */ - WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); + WREG32(RADEON_MM_INDEX, RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); + WREG32(RADEON_MM_DATA, radeon_crtc->legacy_cursor_offset); } } @@ -270,17 +272,14 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc, if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN) y *= 2; - WREG32(RADEON_CUR_HORZ_VERT_OFF + radeon_crtc->crtc_offset, - (RADEON_CUR_LOCK - | (xorigin << 16) - | yorigin)); - WREG32(RADEON_CUR_HORZ_VERT_POSN + radeon_crtc->crtc_offset, - (RADEON_CUR_LOCK - | ((xorigin ? 0 : x) << 16) - | (yorigin ? 0 : y))); + WREG32(RADEON_MM_INDEX, RADEON_CUR_HORZ_VERT_OFF + radeon_crtc->crtc_offset); + WREG32(RADEON_MM_DATA, RADEON_CUR_LOCK | xorigin << 16 | yorigin); + WREG32(RADEON_MM_INDEX, RADEON_CUR_HORZ_VERT_POSN + radeon_crtc->crtc_offset); + WREG32(RADEON_MM_DATA, RADEON_CUR_LOCK | (xorigin ? 0 : x) << 16 | + (yorigin ? 0 : y)); /* offset is from DISP(2)_BASE_ADDRESS */ - WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, (radeon_crtc->legacy_cursor_offset + - (yorigin * 256))); + WREG32(RADEON_MM_INDEX, RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); + WREG32(RADEON_MM_DATA, radeon_crtc->legacy_cursor_offset + yorigin * 256); } radeon_lock_cursor(crtc, false);