On Mon, Oct 26, 2020 at 11:04:42PM +0100, Bernhard Übelacker wrote:
> From wikipedia [1] the pminud instruction at 0x...6fb got
> introduced with sse4.1 which seem not supported from your
> flags line (while on the other side intel says [2] it is a Penryn).
OTOH, apparently wikipedia knows better than Intel itself :-)
https://en.wikipedia.org/wiki/SSE4#Name_confusion
> (Might there be a bios switch?)
Unfortunately not.
Karsten
> [2]
> https://ark.intel.com/content/www/de/de/ark/products/37253/intel-pentium-processor-t4300-1m-cache-2-10-ghz-800-mhz-fsb.html
--
GPG 40BE 5B0E C98E 1713 AFA6 5BC0 3BEA AC80 7D4F C89B
