cccHi all,
I'm porting an application from a Linux environment to Cygwin. During this
process I encountered the following: it seems that invoking gcc from a Makefile
behaves differently over gcc being invoked directly from the command line. When
ggc is invoked from within a Makefile, symbols are stripped from the object
file. When gcc is invoked with exactly the same arguments, the symbols remain
in the object file.
I've made a small test case, narrowing the problem down.
Consider a C file containing the following:
cyg
#include <stdio.h>
void hello()
{
printf("Hello world\n");
}
and a Makefile:
hello.o:
gcc -c hello.c
clean:
rm -f *.o *.d *.exe
When I run make an object file is build. The output of "nm hello.o" displays:
00000000 b .bss
00000000 d .data
00000000 t .text
If I run "gcc -c hello.c" directly from the command line I get object file for
which nm displays:
00000000 b .bss
00000000 d .data
00000000 r .rdata
00000000 t .text
00000000 T _hello
U _printf
As you can see in the latter case the expected symbols are in the object file.
Why are they missing when using the Makefile? I can't get my head around it.
I'm on Cygin 1.7.9, gcc 3.4.4, make 3.81
Any help is greatly appreciated.
André Kwakernaak
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