Nate Lawson wrote:
Peter Wemm wrote:
Stephan realized that the kernel already allocates one PTE per virtual
page. Although it normally holds physical addresses plus attributes,
as long as we don't set PG_V, then there are 31 other bits that we
could use for data storage. We could put virtual addresses in there
so long as we didn't set PG_V, and abuse that to have a singly linked
freelist threaded through the PTEs. It turned out even easier
though. As long as the virtual addresses are page aligned, we neatly
avoid all the PG_* mode bits as well.
... because you can shift by the page size, saving 12 bits. But are
there any problems with 2 MB pages?
It should work fine with 2/4MB pages too. Just like PTEs, when a PDE
(the 2/4MB entry) is marked as not present, all the bits but the zeroth
one are available for use to the operating system.
-- Suleiman
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