Hi, Our custom board is designed based on Denverton SOC.
The used boot loader is coreboot-4.13 version and Linux kernel 5.10.30 version. In our design, the eMMC interface is used, and connected Micron e.MMC memory(MTFC64GAPALBH-IT) to it. The eMMC is enabled in coreboot device tree file. Here's the snippet from ./src/mainboard/intel/harcuvar/devicetree.cb file. device pci 1a.2 on end # UART 2 device pci 1c.0 on end # eMMC device pci 1f.0 on end # LPC bridge device pci 1f.2 on end # PMC/ACPI and, in linux kernel following kernel modules are enabled for host controller, # MMC/SD/SDIO Host Controller Drivers # # CONFIG_MMC_DEBUG is not set CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_IO_ACCESSORS=y CONFIG_MMC_SDHCI_PCI=y CONFIG_MMC_RICOH_MMC=y CONFIG_MMC_SDHCI_ACPI=y # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_WBSD is not set # CONFIG_MMC_TIFM_SD is not set # CONFIG_MMC_SPI is not set # CONFIG_MMC_CB710 is not set # CONFIG_MMC_VIA_SDMMC is not set # CONFIG_MMC_VUB300 is not set # CONFIG_MMC_USHC is not set # CONFIG_MMC_USDHI6ROL0 is not set CONFIG_MMC_CQHCI=y and for memory device enabled following kernel modules, CONFIG_MMC=y CONFIG_PWRSEQ_EMMC=y CONFIG_PWRSEQ_SIMPLE=y CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_MINORS=8 Per SOC datasheet the host controller is seen in Bus 0, Device 28 and Function 0 in PCI bus, but the connected memory is not detected under this controller. when added debug prints in linux kernel driver source files, found that the mmc_rescan( ) function is failing due to mmc_attach failing with errno -110. Thanks, Murali
_______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org