On Tue, Apr 11, 2023 at 11:10 PM Tomas <to...@fritiofson.se> wrote:
>
> Hi,
> I installed Coreboot with SeaBIOS on a Supermicro X11SSH-LN4F.
> The stock BIOS can read two NVMe drives in a Dual m.2 splitter card inserted
> in the middle slot 5 on the motherboard.
> But coreboot can not. In the coreboot nconfig menu there is no setting that
> will enable bifurcation of the x8 slot to x4x4.
>
> Is this something that is configurable in any way?
>
HI Tomas
The patch below might give you directions or ideas.
I don't have the hardware in question, so mostly guessing based on the
comments in the file. If you have lspci output from OEM boot, it could
help.
Kyösti
commit 12e9004e02a6f7225e5147e2e13483315a2b3b05
Author: Kyösti Mälkki <kyosti.mal...@gmail.com>
Date: Thu Apr 13 10:09:26 2023 +0300
test-supermicro
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
index 35825f8630..b223e1e794 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
@@ -56,7 +56,12 @@ chip soc/intel/skylake
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthShort" "CPU SLOT6 PCI-E 3.0 X8(IN X16)" "SlotDataBusWidth8X"
end # CPU PCIE Slot (JPCIE3)
device pci 01.1 on # CPU PCIE Slot (JPCIE2)
- smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthShort" "CPU SLOT6 PCI-E 3.0 X8" "SlotDataBusWidth8X"
+ register "Peg1MaxLinkWidth" = "Peg1_x4"
+ smbios_slot_desc "SlotTypePciExpressGen3X4" "SlotLengthShort" "CPU SLOT5-0 PCI-E 3.0 X4" "SlotDataBusWidth4X"
+ end
+ device pci 01.2 on # CPU PCIE Slot (JPCIE2)
+ register "Peg2MaxLinkWidth" = "Peg2_x4"
+ smbios_slot_desc "SlotTypePciExpressGen3X4" "SlotLengthShort" "CPU SLOT5-1 PCI-E 3.0 X4" "SlotDataBusWidth4X"
end
device pci 02.0 on end # Integrated Graphics Device (No Output)
device pci 1c.0 on # PCI Express Port 1
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