Hi Peter, Pardon me for the late response, at the moment I have an apu2e2 board [1] which I'm trying to set up. The configuration uses the following file for the Southbridge SMI handlers: src/southbridge/amd/pi/hudson/smihandler.c [2]. The amount of SMI code in it is quite small, in comparison to the SMM code for Intel CPUs in src/southbridge/intel/ [3], for example.
Nevertheless, I would be able to perform testing on this board, I think. Do you have pointers as to how I could increase the code present in SMM, or is this simply the configuration for the board and that's that? Thank you for your help thus far. Best regards, Mick [1] https://www.pcengines.ch/apu2.htm [2] https://github.com/pcengines/coreboot/blob/f658838fbb91a428dd46887e49a02a06666078d1/src/southbridge/amd/pi/hudson/smihandler.c [3] https://github.com/pcengines/coreboot/blob/f658838fbb91a428dd46887e49a02a06666078d1/src/southbridge/intel/common/smihandler.c _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
