Thanks Furquan.

Here are 3 logs. Log 1 is at the commit just before the problem. Log 2
is at the problem commit. Log 3 is at the current master, if that's
what you meant by ToT.

I'm using SeaBIOS 1.13.0, compiled once using the attached .config
before taking these logs. All 3 runs are taken using the same SeaBIOS
binary.

Then I recompiled SeaBIOS with CONFIG_RELOCATE_INIT off, replaced the
payload used in run 3, and took an extra run. In this case the board
reset on its own at "Scanning option roms", looping infinitely.

Hope this helps
Keith

On Wed, May 13, 2020 at 7:38 AM Furquan Shaikh
<furquan.m.sha...@gmail.com> wrote:
>
> Thanks for the report Keith!
>
> On Wed, May 13, 2020 at 3:42 AM Paul Menzel <pmen...@molgen.mpg.de> wrote:
> >
> > Dear Keith,
> >
> >
> > Am 13.05.20 um 05:21 schrieb Keith Hui:
> >
> > > I am still refining the P2B family of boards, now including the
> > > infamous P3B-F with an unusual appetite for hacks to make work.
> > >
> > > That said, I'm now finding that, on P3B-F, SeaBIOS hangs when it tries
> > > to relocate itself as part of its usual chores. Having just learned
> > > git bisect, I decided to try it out.
> > >
> > > It was commit 3b02006afe8a85477dafa1bd149f1f0dba02afc7 [1] that broke
> > > my SeaBIOS. It doesn't affect my newer toy the P8Z77-M as much as
> > > P3B-F, but I still want to blame that, and probably the very next
> > > commit as well, as they both deal with some very modern aspects of PCI
> > > that well predates the 440BX.
> > >
> > > Is there anything we can do to fix 3b02006afe?
> >
> > I commented in the change-set [1] to make the author and reviewers aware
> > of this issue and referenced your list message, and ask to comment here.
> >
> > Could you please provide the debug log of coreboot and SeaBIOS?
>
> As Paul mentioned, can you please provide the debug logs for coreboot
> and SeaBIOS both with ToT coreboot and with HEAD set before the change
> 3b02006afe where it does not hang? Thanks!
>
> >
> >
> > > Meanwhile I ported the P3B-F board enable to flashrom [2], which got a
> > > heavy workout during this bisect, through vendor firmware and both
> > > good and bad builds of coreboot. In all cases I can flash internal, no
> > > longer having to haul out my P2B-LS just to use it as a flasher.
> > >
> > > Enjoy this long overdue board enable. If it gets submitted, I'll
> > > retract the ramstage hack[3] doing the same as redundant.
> >
> > Very nice! It’s always amazing, how after so many years, when the vendor
> > already stopped supporting the device, the community still supports the
> > device and improves the firmware showing that Free Software is the more
> > sustainable way.
> >
> >
> > Kind regards,
> >
> > Paul
> >
> >
> > > [1] https://review.coreboot.org/c/coreboot/+/39486
> > > [2] https://review.coreboot.org/c/flashrom/+/41354
> > > [3] https://review.coreboot.org/c/coreboot/+/41224
> > _______________________________________________
> > coreboot mailing list -- coreboot@coreboot.org
> > To unsubscribe send an email to coreboot-le...@coreboot.org

coreboot-4.12-34-g3f3f53cd5e Tue May 12 20:12:17 UTC 2020 romstage starting (log level: 7)...
Romstage stack size limited to 0x1000!
SMBus controller enabled
CBMEM:
IMD: root @ 0x2ffff000 254 entries.
IMD: root @ 0x2fffec00 62 entries.
MTRR Range: Start=2f800000 End=30000000 (Size 800000)
MTRR Range: Start=fffc0000 End=0 (Size 40000)
FMAP: area COREBOOT found @ 200 (261632 bytes)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 18900 size 2720
Decompressing stage fallback/postcar @ 0x2ffd4fc0 (25840 bytes)
Loading module at 0x2ffd5000 with entry 0x2ffd5000. filesize: 0x2608 memsize: 0x64b0
Processing 47 relocs. Offset value of 0x2dfd5000
BS: romstage times (exec / console): total (unknown) / 60 ms


coreboot-4.12-34-g3f3f53cd5e Tue May 12 20:12:17 UTC 2020 ramstage starting (log level: 7)...
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: 00:04.0 [8086/7110] enabled
PCI: 00:04.1 [8086/7111] enabled
PCI: 00:04.2 [8086/7112] enabled
PCI: 00:04.3 [8086/7113] enabled
PCI: 00:0b.0 [10ec/8169] enabled
PCI: 00:01.0 scanning...
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [10de/0322] enabled
scan_bus: bus PCI: 00:01.0 finished in 5 msecs
PCI: 00:04.0 scanning...
PNP: 03f0.0 enabled
PNP: 03f0.1 enabled
PNP: 03f0.2 enabled
PNP: 03f0.3 enabled
PNP: 03f0.5 enabled
PNP: 03f0.7 enabled
PNP: 03f0.8 enabled
PNP: 03f0.a disabled
scan_bus: bus PCI: 00:04.0 finished in 14 msecs
PCI: 00:04.3 scanning...
scan_bus: bus PCI: 00:04.3 finished in 0 msecs
scan_bus: bus DOMAIN: 0000 finished in 63 msecs
scan_bus: bus Root Device finished in 73 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 82 ms
found VGA at PCI: 01:00.0
A bridge on the path doesn't support 16-bit VGA decoding!Setting up VGA for PCI: 01:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
PNP: 03f0.8 missing read_resources
Done reading resources.
Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements)
Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources)
Resource ranges:
Base: 1000, Size: d000, Tag: 100
Base: f000, Size: 1000, Tag: 100
Resource ranges:
Base: 0, Size: ff800000, Tag: 200
Base: 100000000, Size: f00000000, Tag: 100200
Resource ranges:
Base: 10000000, Size: 8000000, Tag: 1200
Resource ranges:
Base: 18000000, Size: 1100000, Tag: 200
Setting RAM size to 768 MB
PCI: 00:00.0 10 <- [0x0000000000 - 0x000fffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x0010000000 - 0x0017ffffff] size 0x08000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x0018000000 - 0x00190fffff] size 0x01100000 gran 0x14 bus 01 mem
PCI: 01:00.0 10 <- [0x0018000000 - 0x0018ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 14 <- [0x0010000000 - 0x0017ffffff] size 0x08000000 gran 0x1b prefmem
PCI: 01:00.0 30 <- [0x0019000000 - 0x001901ffff] size 0x00020000 gran 0x11 romem
PNP: 03f0.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 03f0.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 03f0.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 03f0.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 03f0.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 03f0.1 74 drq size: 0x0000000001 not assigned in devicetree
PNP: 03f0.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 03f0.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 03f0.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 03f0.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 03f0.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 03f0.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 03f0.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 03f0.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
ERROR: PNP: 03f0.7 60 io size: 0x0000000001 not assigned in devicetree
ERROR: PNP: 03f0.7 62 io size: 0x0000000002 not assigned in devicetree
ERROR: PNP: 03f0.7 70 irq size: 0x0000000001 not assigned in devicetree
PCI: 00:04.1 20 <- [0x0000003000 - 0x000000300f] size 0x00000010 gran 0x04 io
PCI: 00:04.2 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 00:0b.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 00:0b.0 14 <- [0x0019120000 - 0x00191200ff] size 0x00000100 gran 0x08 mem
PCI: 00:0b.0 30 <- [0x0019100000 - 0x001911ffff] size 0x00020000 gran 0x11 romem
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 1 / 278 ms
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 009b
PCI: 00:01.0 cmd <- 07
PCI: 00:04.0 cmd <- 07
PCI: 00:04.1 cmd <- 01
PCI: 00:04.2 cmd <- 01
PCI: 00:04.3 cmd <- 01
PCI: 00:0b.0 cmd <- 03
PCI: 01:00.0 cmd <- 03
done.
BS: BS_DEV_ENABLE run times (exec / console): 0 / 22 ms
Initializing devices...
CPU_CLUSTER: 0 init
Initializing CPU #0
CPU: vendor Intel device 6b1
CPU: family 06, model 0b, stepping 01
Enabling cache
FMAP: area COREBOOT found @ 200 (261632 bytes)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 4080 size 14800
microcode: sig=0x6b1 pf=0x10 revision=0x0
microcode: updated to revision 0x1c date=2001-02-15
CPU: Intel(R) Celeron(TM) CPU                1400MHz.
MTRR: Physical address space:
0x0000000000000000 - 0x0000000010000000 size 0x10000000 type 0
0x0000000010000000 - 0x0000000018000000 size 0x08000000 type 1
0x0000000018000000 - 0x0000000019121000 size 0x01121000 type 0
0x0000000019121000 - 0x00000000ff800000 size 0xe66df000 type 6
0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 0
0x0000000100000000 - 0x0000040000000000 size 0x3ff00000000 type 6
MTRR: Fixed MSR 0x250 0x0000000000000000
MTRR: Fixed MSR 0x258 0x0000000000000000
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0000000000000000
MTRR: Fixed MSR 0x269 0x0000000000000000
MTRR: Fixed MSR 0x26a 0x0000000000000000
MTRR: Fixed MSR 0x26b 0x0000000000000000
MTRR: Fixed MSR 0x26c 0x0000000000000000
MTRR: Fixed MSR 0x26d 0x0000000000000000
MTRR: Fixed MSR 0x26e 0x0000000000000000
MTRR: Fixed MSR 0x26f 0x0000000000000000
CPU physical address size: 36 bits
MTRR: Removing WRCOMB type. WB/UC MTRR counts: 7/27 > 6.
MTRR: default type WB/UC MTRR counts: 7/26.
MTRR: WB selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000ff0000000 type 0
MTRR: 1 base 0x0000000010000000 mask 0x0000000ff8000000 type 0
MTRR: 2 base 0x0000000018000000 mask 0x0000000fff000000 type 0
MTRR: 3 base 0x0000000019000000 mask 0x0000000ffff00000 type 0
MTRR: 4 base 0x0000000019100000 mask 0x0000000ffffe0000 type 0
MTRR: 5 base 0x0000000019120000 mask 0x0000000ffffff000 type 0
Taking a reserved OS MTRR.
MTRR: 6 base 0x00000000ff800000 mask 0x0000000fff800000 type 0

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

CPU #0 initialized
CPU_CLUSTER: 0 init finished in 177 msecs
PCI: 00:00.0 init
PCI: 00:00.0 init finished in 0 msecs
PCI: 00:04.0 init
RTC Init
PCI: 00:04.0 init finished in 0 msecs
PCI: 00:04.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: on
IDE: Primary IDE interface, drive 1: UDMA/33: on
IDE: Secondary IDE interface, drive 0: UDMA/33: on
IDE: Secondary IDE interface, drive 1: UDMA/33: on
PCI: 00:04.1 init finished in 26 msecs
PCI: 00:04.2 init
PCI: 00:04.2 init finished in 0 msecs
PCI: 00:0b.0 init
PCI: 00:0b.0 init finished in 0 msecs
PCI: 01:00.0 init
PCI: 01:00.0 init finished in 0 msecs
PNP: 03f0.0 init
PNP: 03f0.0 init finished in 0 msecs
PNP: 03f0.1 init
PNP: 03f0.1 init finished in 0 msecs
PNP: 03f0.2 init
PNP: 03f0.2 init finished in 0 msecs
PNP: 03f0.3 init
PNP: 03f0.3 init finished in 0 msecs
PNP: 03f0.5 init
PNP: 03f0.5 init finished in 0 msecs
PNP: 03f0.7 init
PNP: 03f0.7 init finished in 0 msecs
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 3 / 271 ms
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
Copying Interrupt Routing Table to 0x000f0000... done.
Copying Interrupt Routing Table to 0x2ffab000... done.
PIRQ table: 160 bytes.
smbios_write_tables: 2ffaa000
SMBIOS: Unknown CPU
SMBIOS tables: 343 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum fe4
Writing coreboot table at 0x2ffac000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-000000002ffa9fff: RAM
 3. 000000002ffaa000-000000002ffb4fff: CONFIGURATION TABLES
 4. 000000002ffb5000-000000002ffd3fff: RAMSTAGE
 5. 000000002ffd4000-000000002fffffff: CONFIGURATION TABLES
 6. 0000000030000000-00000000ff7fffff: RAM
 7. 00000000ff800000-00000000ffffffff: RESERVED
 8. 0000000100000000-000003ffffffffff: RAM
FMAP: area COREBOOT found @ 200 (261632 bytes)
Wrote coreboot table at: 0x2ffac000, 0x284 bytes, checksum e1cc
coreboot table: 668 bytes.
IMD ROOT    0. 0x2ffff000 0x00001000
IMD SMALL   1. 0x2fffe000 0x00001000
CONSOLE     2. 0x2ffde000 0x00020000
TIME STAMP  3. 0x2ffdd000 0x00000910
ROMSTG STCK 4. 0x2ffdc000 0x00001000
AFTER CAR   5. 0x2ffd4000 0x00008000
RAMSTAGE    6. 0x2ffb4000 0x00020000
COREBOOT    7. 0x2ffac000 0x00008000
IRQ TABLE   8. 0x2ffab000 0x00001000
SMBIOS      9. 0x2ffaa000 0x00000800
IMD small region:
  IMD ROOT    0. 0x2fffec00 0x00000400
  FMAP        1. 0x2fffeb40 0x000000b6
BS: BS_WRITE_TABLES run times (exec / console): 0 / 126 ms
FMAP: area COREBOOT found @ 200 (261632 bytes)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 25340 size c078
Checking segment from ROM address 0xfffe5578
Checking segment from ROM address 0xfffe5594
Loading segment from ROM address 0xfffe5578
  code (compression=1)
  New segment dstaddr 0x000e8fe0 memsize 0x17020 srcaddr 0xfffe55b0 filesize 0xc040
Loading Segment: addr: 0x000e8fe0 memsz: 0x0000000000017020 filesz: 0x000000000000c040
using LZMA
Loading segment from ROM address 0xfffe5594
  Entry Point 0x000fcb00
BS: BS_PAYLOAD_LOAD run times (exec / console): 69 / 47 ms
Jumping to boot code at 0x000fcb00(0x2ffac000)
SeaBIOS (version 1.13.0-20200513_092016-tonchan.tondebuurincentral.com)
BUILD: gcc: (GCC) 9.2.1 20190827 (Red Hat 9.2.1-1) binutils: version 2.32-29.fc31
Attempting to find coreboot table
Found coreboot table forwarder.
Now attempting to find coreboot memory map
Add to e820 map: 00000000 00001000 2
Add to e820 map: 00001000 0009f000 1
Add to e820 map: 000c0000 2feea000 1
Add to e820 map: 2ffaa000 00056000 2
Add to e820 map: 30000000 cf800000 1
Add to e820 map: ff800000 00800000 2
Add to e820 map: 100000000 3ff00000000 1
Add to e820 map: 00000000 00004000 1
SeaBIOS (version 1.13.0-20200513_092016-tonchan.tondebuurincentral.com)
BUILD: gcc: (GCC) 9.2.1 20190827 (Red Hat 9.2.1-1) binutils: version 2.32-29.fc31
Found coreboot cbmem console @ 2ffde000
Found mainboard ASUS P3B-F
malloc preinit
Add to e820 map: 000a0000 00050000 -1
Add to e820 map: 000f0000 00010000 2
Add to e820 map: ff7c0000 00040000 2
phys_alloc zone=0x000f0d14 size=27808 align=20 ret=ff7b92a0 (detail=0xff7b9270)
Relocating init from 0x000ea100 to 0xff7b92a0 (size 27808)

coreboot-4.12-8-ge6fb1344ed Tue May 12 19:42:50 UTC 2020 romstage starting (log level: 7)...
Romstage stack size limited to 0x1000!
SMBus controller enabled
CBMEM:
IMD: root @ 0x2ffff000 254 entries.
IMD: root @ 0x2fffec00 62 entries.
MTRR Range: Start=2f800000 End=30000000 (Size 800000)
MTRR Range: Start=fffc0000 End=0 (Size 40000)
FMAP: area COREBOOT found @ 200 (261632 bytes)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 22c80 size 2720
Decompressing stage fallback/postcar @ 0x2ffd4fc0 (25840 bytes)
Loading module at 0x2ffd5000 with entry 0x2ffd5000. filesize: 0x2608 memsize: 0x64b0
Processing 47 relocs. Offset value of 0x2dfd5000
BS: romstage times (exec / console): total (unknown) / 60 ms


coreboot-4.12-8-ge6fb1344ed Tue May 12 19:42:50 UTC 2020 ramstage starting (log level: 7)...
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: 00:04.0 [8086/7110] enabled
PCI: 00:04.1 [8086/7111] enabled
PCI: 00:04.2 [8086/7112] enabled
PCI: 00:04.3 [8086/7113] enabled
PCI: 00:0b.0 [10ec/8169] enabled
PCI: 00:01.0 scanning...
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [10de/0322] enabled
scan_bus: bus PCI: 00:01.0 finished in 5 msecs
PCI: 00:04.0 scanning...
PNP: 03f0.0 enabled
PNP: 03f0.1 enabled
PNP: 03f0.2 enabled
PNP: 03f0.3 enabled
PNP: 03f0.5 enabled
PNP: 03f0.7 enabled
PNP: 03f0.8 enabled
PNP: 03f0.a disabled
scan_bus: bus PCI: 00:04.0 finished in 14 msecs
PCI: 00:04.3 scanning...
scan_bus: bus PCI: 00:04.3 finished in 0 msecs
scan_bus: bus DOMAIN: 0000 finished in 63 msecs
scan_bus: bus Root Device finished in 73 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 82 ms
found VGA at PCI: 01:00.0
A bridge on the path doesn't support 16-bit VGA decoding!Setting up VGA for PCI: 01:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
PNP: 03f0.8 missing read_resources
Done reading resources.
Setting resources...
Setting RAM size to 768 MB
PCI: 00:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f8000000 - 0x00f90fffff] size 0x01100000 gran 0x14 bus 01 mem
PCI: 01:00.0 10 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 14 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x1b prefmem
PCI: 01:00.0 30 <- [0x00f9000000 - 0x00f901ffff] size 0x00020000 gran 0x11 romem
PNP: 03f0.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 03f0.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 03f0.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 03f0.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 03f0.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 03f0.1 74 drq size: 0x0000000001 not assigned in devicetree
PNP: 03f0.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 03f0.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 03f0.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 03f0.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 03f0.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 03f0.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 03f0.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 03f0.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
ERROR: PNP: 03f0.7 60 io size: 0x0000000001 not assigned in devicetree
ERROR: PNP: 03f0.7 62 io size: 0x0000000002 not assigned in devicetree
ERROR: PNP: 03f0.7 70 irq size: 0x0000000001 not assigned in devicetree
PCI: 00:04.1 20 <- [0x0000001420 - 0x000000142f] size 0x00000010 gran 0x04 io
PCI: 00:04.2 20 <- [0x0000001400 - 0x000000141f] size 0x00000020 gran 0x05 io
PCI: 00:0b.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 00:0b.0 14 <- [0x00f9120000 - 0x00f91200ff] size 0x00000100 gran 0x08 mem
PCI: 00:0b.0 30 <- [0x00f9100000 - 0x00f911ffff] size 0x00020000 gran 0x11 romem
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 0 / 242 ms
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 009b
PCI: 00:01.0 cmd <- 07
PCI: 00:04.0 cmd <- 07
PCI: 00:04.1 cmd <- 01
PCI: 00:04.2 cmd <- 01
PCI: 00:04.3 cmd <- 01
PCI: 00:0b.0 cmd <- 03
PCI: 01:00.0 cmd <- 03
done.
BS: BS_DEV_ENABLE run times (exec / console): 0 / 22 ms
Initializing devices...
CPU_CLUSTER: 0 init
Initializing CPU #0
CPU: vendor Intel device 6b1
CPU: family 06, model 0b, stepping 01
Enabling cache
FMAP: area COREBOOT found @ 200 (261632 bytes)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 4080 size 14800
microcode: sig=0x6b1 pf=0x10 revision=0x0
microcode: updated to revision 0x1c date=2001-02-15
CPU: Intel(R) Celeron(TM) CPU                1400MHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000030000000 size 0x2ff40000 type 6
0x0000000030000000 - 0x00000000f0000000 size 0xc0000000 type 0
0x00000000f0000000 - 0x00000000f8000000 size 0x08000000 type 1
0x00000000f8000000 - 0x0000000100000000 size 0x08000000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 7/3.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000fe0000000 type 6
MTRR: 1 base 0x0000000020000000 mask 0x0000000ff0000000 type 6
MTRR: 2 base 0x00000000f0000000 mask 0x0000000ff8000000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

CPU #0 initialized
CPU_CLUSTER: 0 init finished in 147 msecs
PCI: 00:00.0 init
PCI: 00:00.0 init finished in 0 msecs
PCI: 00:04.0 init
RTC Init
PCI: 00:04.0 init finished in 0 msecs
PCI: 00:04.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: on
IDE: Primary IDE interface, drive 1: UDMA/33: on
IDE: Secondary IDE interface, drive 0: UDMA/33: on
IDE: Secondary IDE interface, drive 1: UDMA/33: on
PCI: 00:04.1 init finished in 26 msecs
PCI: 00:04.2 init
PCI: 00:04.2 init finished in 0 msecs
PCI: 00:0b.0 init
PCI: 00:0b.0 init finished in 0 msecs
PCI: 01:00.0 init
PCI: 01:00.0 init finished in 0 msecs
PNP: 03f0.0 init
PNP: 03f0.0 init finished in 0 msecs
PNP: 03f0.1 init
PNP: 03f0.1 init finished in 0 msecs
PNP: 03f0.2 init
PNP: 03f0.2 init finished in 0 msecs
PNP: 03f0.3 init
PNP: 03f0.3 init finished in 0 msecs
PNP: 03f0.5 init
PNP: 03f0.5 init finished in 0 msecs
PNP: 03f0.7 init
PNP: 03f0.7 init finished in 0 msecs
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 3 / 241 ms
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
Copying Interrupt Routing Table to 0x000f0000... done.
Copying Interrupt Routing Table to 0x2ffab000... done.
PIRQ table: 160 bytes.
smbios_write_tables: 2ffaa000
SMBIOS: Unknown CPU
SMBIOS tables: 342 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum fe4
Writing coreboot table at 0x2ffac000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-000000002ffa9fff: RAM
 3. 000000002ffaa000-000000002ffb4fff: CONFIGURATION TABLES
 4. 000000002ffb5000-000000002ffd3fff: RAMSTAGE
 5. 000000002ffd4000-000000002fffffff: CONFIGURATION TABLES
 6. 00000000ff800000-00000000ffffffff: RESERVED
FMAP: area COREBOOT found @ 200 (261632 bytes)
Wrote coreboot table at: 0x2ffac000, 0x25c bytes, checksum bfc1
coreboot table: 628 bytes.
IMD ROOT    0. 0x2ffff000 0x00001000
IMD SMALL   1. 0x2fffe000 0x00001000
CONSOLE     2. 0x2ffde000 0x00020000
TIME STAMP  3. 0x2ffdd000 0x00000910
ROMSTG STCK 4. 0x2ffdc000 0x00001000
AFTER CAR   5. 0x2ffd4000 0x00008000
RAMSTAGE    6. 0x2ffb4000 0x00020000
COREBOOT    7. 0x2ffac000 0x00008000
IRQ TABLE   8. 0x2ffab000 0x00001000
SMBIOS      9. 0x2ffaa000 0x00000800
IMD small region:
  IMD ROOT    0. 0x2fffec00 0x00000400
  FMAP        1. 0x2fffeb40 0x000000b6
BS: BS_WRITE_TABLES run times (exec / console): 0 / 118 ms
FMAP: area COREBOOT found @ 200 (261632 bytes)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 25400 size 17058
Checking segment from ROM address 0xfffe5638
Checking segment from ROM address 0xfffe5654
Loading segment from ROM address 0xfffe5638
  code (compression=0)
  New segment dstaddr 0x000e8fe0 memsize 0x17020 srcaddr 0xfffe5670 filesize 0x17020
Loading Segment: addr: 0x000e8fe0 memsz: 0x0000000000017020 filesz: 0x0000000000017020
it's not compressed!
Loading segment from ROM address 0xfffe5654
  Entry Point 0x000fcb00
BS: BS_PAYLOAD_LOAD run times (exec / console): 79 / 48 ms
Jumping to boot code at 0x000fcb00(0x2ffac000)
SeaBIOS (version 1.13.0-20200513_092016-tonchan.tondebuurincentral.com)
BUILD: gcc: (GCC) 9.2.1 20190827 (Red Hat 9.2.1-1) binutils: version 2.32-29.fc31
Attempting to find coreboot table
Found coreboot table forwarder.
Now attempting to find coreboot memory map
Add to e820 map: 00000000 00001000 2
Add to e820 map: 00001000 0009f000 1
Add to e820 map: 000c0000 2feea000 1
Add to e820 map: 2ffaa000 00056000 2
Add to e820 map: ff800000 00800000 2
Add to e820 map: 00000000 00004000 1
SeaBIOS (version 1.13.0-20200513_092016-tonchan.tondebuurincentral.com)
BUILD: gcc: (GCC) 9.2.1 20190827 (Red Hat 9.2.1-1) binutils: version 2.32-29.fc31
Found coreboot cbmem console @ 2ffde000
Found mainboard ASUS P3B-F
malloc preinit
Add to e820 map: 000a0000 00050000 -1
Add to e820 map: 000f0000 00010000 2
Add to e820 map: 2ff6a000 00040000 2
phys_alloc zone=0x000f0d14 size=27808 align=20 ret=2ff632c0 (detail=0x2ff63290)
Relocating init from 0x000ea100 to 0x2ff632c0 (size 27808)
malloc init
Found CBFS header at 0xfffc0238
phys_alloc zone=0x2ff69ed4 size=156 align=10 ret=2ff63190 (detail=0x2ff63160)
Add romfile: cbfs master header (size=32)
phys_alloc zone=0x2ff69ed4 size=156 align=10 ret=2ff630c0 (detail=0x2ff63090)
Add romfile: fallback/romstage (size=16260)
phys_alloc zone=0x2ff69ed4 size=156 align=10 ret=2ff62ff0 (detail=0x2ff62fc0)
Add romfile: cpu_microcode_blob.bin (size=83968)
phys_alloc zone=0x2ff69ed4 size=156 align=10 ret=2ff62f20 (detail=0x2ff62ef0)
Add romfile: fallback/ramstage (size=41798)
phys_alloc zone=0x2ff69ed4 size=156 align=10 ret=2ff62e50 (detail=0x2ff62e20)
Add romfile: fallback/postcar (size=10016)
phys_alloc zone=0x2ff69ed4 size=156 align=10 ret=2ff62d80 (detail=0x2ff62d50)
Add romfile: fallback/payload (size=94296)
phys_alloc zone=0x2ff69ed4 size=156 align=10 ret=2ff62cb0 (detail=0x2ff62c80)
Add romfile: etc/ps2-keyboard-spinup (size=8)
phys_alloc zone=0x2ff69ed4 size=156 align=10 ret=2ff62be0 (detail=0x2ff62bb0)
Add romfile:  (size=6232)
phys_alloc zone=0x2ff69ed4 size=156 align=10 ret=2ff62b10 (detail=0x2ff62ae0)
Add romfile: bootblock (size=8192)
init ivt
init bda
Add to e820 map: 0009fc00 00000400 2
init bios32
init PMM
init PNPBIOS table
init keyboard
init mouse
init pic
math cp init
PCI probe
phys_alloc zone=0x2ff69ed4 size=32 align=10 ret=2ff62ac0 (detail=0x2ff62a90)
PCI device 00:00.0 (vd=8086:7190 c=0600)
phys_alloc zone=0x2ff69ed4 size=32 align=10 ret=2ff62a70 (detail=0x2ff62a40)
PCI device 00:01.0 (vd=8086:7191 c=0604)
phys_alloc zone=0x2ff69ed4 size=32 align=10 ret=2ff62a20 (detail=0x2ff629f0)
PCI device 00:04.0 (vd=8086:7110 c=0601)
phys_alloc zone=0x2ff69ed4 size=32 align=10 ret=2ff629d0 (detail=0x2ff629a0)
PCI device 00:04.1 (vd=8086:7111 c=0101)
phys_alloc zone=0x2ff69ed4 size=32 align=10 ret=2ff62980 (detail=0x2ff62950)
PCI device 00:04.2 (vd=8086:7112 c=0c03)
phys_alloc zone=0x2ff69ed4 size=32 align=10 ret=2ff62930 (detail=0x2ff62900)
PCI device 00:04.3 (vd=8086:7113 c=0680)
phys_alloc zone=0x2ff69ed4 size=32 align=10 ret=2ff628e0 (detail=0x2ff628b0)
PCI device 00:0b.0 (vd=10ec:8169 c=0200)
phys_alloc zone=0x2ff69ed4 size=32 align=10 ret=2ff62890 (detail=0x2ff62860)
PCI device 01:00.0 (vd=10de:0322 c=0300)
Found 8 PCI devices (max PCI bus is 01)
Relocating coreboot bios tables
phys_alloc zone=0x2ff69edc size=31 align=10 ret=f0d80 (detail=0x2ff62830)
Copying SMBIOS entry point from 0x2ffaa000 to 0x000f0d80
phys_alloc zone=0x2ff69edc size=160 align=10 ret=f0ce0 (detail=0x2ff62800)
Copying PIR from 0x2ffab000 to 0x000f0ce0
rsdp=0x00000000
tsc calibrate start=1990790609 end=1993200393 diff=2409784
CPU Mhz=1404
init timer
Scan for VGA option rom
Attempting to init PCI bdf 01:00.0 (vd 10de:0322)
Attempting to map option rom on dev 01:00.0
Option rom sizing returned f9000000 fffe0000
Inspecting possible rom at 0xf9000000 (vd=10de:0322 bdf=01:00.0)
Copying option rom (size 62464) from 0xf9000000 to 0x000c0000
Checking rom 0x000c0000 (sig aa55 size 122)
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version 1.13.0-20200513_092016-tonchan.tondebuurincentral.com)
init usb
phys_alloc zone=0x2ff69ed4 size=28 align=10 ret=2ff627e0 (detail=0x2ff627b0)
UHCI init on dev 00:04.2 (io=1400)
phys_alloc zone=0x2ff69ee0 size=16 align=10 ret=2ffa9ff0 (detail=0x2ff62780)
phys_alloc zone=0x2ff69ee0 size=4096 align=1000 ret=2ffa8000 (detail=0x2ff62750)
phys_alloc zone=0x2ff69ee0 size=28 align=10 ret=2ffa9fd0 (detail=0x2ff62720)
phys_alloc zone=0x2ff69ee0 size=28 align=10 ret=2ffa9fb0 (detail=0x2ff626f0)
phys_alloc zone=0x2ff69ed4 size=28 align=10 ret=2ff626d0 (detail=0x2ff626a0)
phys_free 2ff626d0 (detail=0x2ff626a0)
phys_alloc zone=0x2ff69ed4 size=28 align=10 ret=2ff626d0 (detail=0x2ff626a0)
phys_free 2ff626d0 (detail=0x2ff626a0)
uhci_free_pipes 0x2ff627e0
phys_free 2ffa9ff0 (detail=0x2ff62780)
phys_free 2ffa8000 (detail=0x2ff62750)
phys_free 2ffa9fd0 (detail=0x2ff62720)
phys_free 2ffa9fb0 (detail=0x2ff626f0)
phys_free 2ff627e0 (detail=0x2ff627b0)
init ps2port
i8042_flush
i8042_command cmd=ad
i8042_wait_write
i8042_command cmd=a7
i8042_wait_write
i8042_flush
i8042_command cmd=1aa
i8042_wait_write
i8042_wait_read
i8042 param=55
i8042_command cmd=1ab
i8042_wait_write
i8042_wait_read
i8042 param=0
Copying data 8@0xffffc708 to 8@0x00006e70
ps2_command aux=0 cmd=1ff
i8042 ctr old=30 new=30
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
ps2_sendbyte aux=0 cmd=ff
i8042_kbd_write c=255
i8042_wait_write
ps2 read fa
ps2 read aa
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
ps2_command aux=0 cmd=f5
i8042 ctr old=30 new=30
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
ps2_sendbyte aux=0 cmd=f5
i8042_kbd_write c=245
i8042_wait_write
ps2 read fa
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
ps2_command aux=0 cmd=10f0
i8042 ctr old=30 new=30
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
ps2_sendbyte aux=0 cmd=f0
i8042_kbd_write c=240
i8042_wait_write
ps2 read fa
ps2_sendbyte aux=0 cmd=2
i8042_kbd_write c=2
i8042_wait_write
ps2 read fa
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
ps2_command aux=0 cmd=f4
i8042 ctr old=61 new=70
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
ps2_sendbyte aux=0 cmd=f4
i8042_kbd_write c=244
i8042_wait_write
ps2 read fa
i8042_command cmd=1060
i8042_wait_write
i8042_wait_write
PS2 keyboard initialized
init floppy drives
init hard drives
phys_alloc zone=0x2ff69edc size=20 align=10 ret=f0cc0 (detail=0x2ff627d0)
ATA controller 1 at 1f0/3f4/1420 (irq 14 dev 21)
powerup iobase=1f0 st=50
powerup iobase=1f0 st=50
ata_detect ata0-0: sc=55 sn=aa dh=a0
ata_reset drive=0x00006c24
ata_reset exit status=50
send_cmd : read error (status=51 err=04)
phys_alloc zone=0x2ff69edc size=44 align=10 ret=f0c90 (detail=0x2ff627a0)
phys_alloc zone=0x2ff69ed4 size=80 align=10 ret=2ff62750 (detail=0x2ff62720)
ata0-0: Maxtor 6E040L0 ATA-7 Hard-Disk (39205 MiBytes)
Searching bootorder for: /pci@i0cf8/*@4,1/drive@0/disk@0
Searching bios-geometry for: /pci@i0cf8/*@4,1/drive@0/disk@0
phys_alloc zone=0x2ff69ed4 size=24 align=10 ret=2ff62700 (detail=0x2ff626d0)
Registering bootable: ata0-0: Maxtor 6E040L0 ATA-7 Hard-Disk (39205 MiBytes) (type:2 prio:103 data:f0c90)
ata_detect resetresult=600b
powerup iobase=1f0 st=50
powerup iobase=1f0 st=0
ata_detect ata0-1: sc=55 sn=aa dh=b0
send_cmd : DRQ not set (status 00)
phys_alloc zone=0x2ff69edc size=20 align=10 ret=f0c70 (detail=0x2ff626a0)
ATA controller 2 at 170/374/1428 (irq 15 dev 21)
powerup iobase=170 st=0
powerup iobase=170 st=0
ata_detect ata1-0: sc=0 sn=0 dh=a0
powerup iobase=170 st=0
powerup iobase=170 st=0
ata_detect ata1-1: sc=0 sn=0 dh=b0
init lpt
Found 1 lpt ports
init serial
Found 2 serial ports
Scan for option roms
Attempting to init PCI bdf 00:00.0 (vd 8086:7190)
Attempting to map option rom on dev 00:00.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:01.0 (vd 8086:7191)
Attempting to map option rom on dev 00:01.0
Skipping non-normal pci device (type=1)
Attempting to init PCI bdf 00:04.0 (vd 8086:7110)
Attempting to map option rom on dev 00:04.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:04.3 (vd 8086:7113)
Attempting to map option rom on dev 00:04.3
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:0b.0 (vd 10ec:8169)
Attempting to map option rom on dev 00:0b.0
Option rom sizing returned f9100000 fffe0000
Inspecting possible rom at 0xf9100000 (vd=10ec:8169 bdf=00:0b.0)
No option rom signature (got f9f9)
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242

Press ESC for boot menu.

enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
enter handle_16:
   a=00000100  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=e000
  si=00000000 di=00000000 bp=00000000 sp=0000ffce cs=f000 ip=fa6b  f=0242
Searching bootorder for: HALT
Mapping hd drive 0x000f0c90 to 0
drive 0x000f0c90: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=80293248
finalize PMM
malloc finalize
Add to e820 map: 0009fc00 00000400 2
Space available for UMB: cf800-ef000, f0000-f0c70
Add to e820 map: 2ff6a000 00040000 1
Returned 262144 bytes of ZoneHigh
e820 map has 6 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 000000002ffaa000 = 1 RAM
  4: 000000002ffaa000 - 0000000030000000 = 2 RESERVED
  5: 00000000ff800000 - 0000000100000000 = 2 RESERVED
Jump to int19
enter handle_19:
  NULL
Booting from Hard Disk...

coreboot-4.12-9-g3b02006afe Tue May 12 19:43:13 UTC 2020 romstage starting (log level: 7)...
Romstage stack size limited to 0x1000!
SMBus controller enabled
CBMEM:
IMD: root @ 0x2ffff000 254 entries.
IMD: root @ 0x2fffec00 62 entries.
MTRR Range: Start=2f800000 End=30000000 (Size 800000)
MTRR Range: Start=fffc0000 End=0 (Size 40000)
FMAP: area COREBOOT found @ 200 (261632 bytes)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 22b00 size 2720
Decompressing stage fallback/postcar @ 0x2ffd4fc0 (25840 bytes)
Loading module at 0x2ffd5000 with entry 0x2ffd5000. filesize: 0x2608 memsize: 0x64b0
Processing 47 relocs. Offset value of 0x2dfd5000
BS: romstage times (exec / console): total (unknown) / 60 ms


coreboot-4.12-9-g3b02006afe Tue May 12 19:43:13 UTC 2020 ramstage starting (log level: 7)...
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: 00:04.0 [8086/7110] enabled
PCI: 00:04.1 [8086/7111] enabled
PCI: 00:04.2 [8086/7112] enabled
PCI: 00:04.3 [8086/7113] enabled
PCI: 00:0b.0 [10ec/8169] enabled
PCI: 00:01.0 scanning...
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [10de/0322] enabled
scan_bus: bus PCI: 00:01.0 finished in 5 msecs
PCI: 00:04.0 scanning...
PNP: 03f0.0 enabled
PNP: 03f0.1 enabled
PNP: 03f0.2 enabled
PNP: 03f0.3 enabled
PNP: 03f0.5 enabled
PNP: 03f0.7 enabled
PNP: 03f0.8 enabled
PNP: 03f0.a disabled
scan_bus: bus PCI: 00:04.0 finished in 14 msecs
PCI: 00:04.3 scanning...
scan_bus: bus PCI: 00:04.3 finished in 0 msecs
scan_bus: bus DOMAIN: 0000 finished in 63 msecs
scan_bus: bus Root Device finished in 73 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 82 ms
found VGA at PCI: 01:00.0
A bridge on the path doesn't support 16-bit VGA decoding!Setting up VGA for PCI: 01:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
PNP: 03f0.8 missing read_resources
Done reading resources.
Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements)
Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources)
Resource ranges:
Base: 1000, Size: d000, Tag: 100
Base: f000, Size: 1000, Tag: 100
Resource ranges:
Base: 0, Size: ff800000, Tag: 200
Resource ranges:
Base: 10000000, Size: 8000000, Tag: 1200
Resource ranges:
Base: 18000000, Size: 1100000, Tag: 200
Setting RAM size to 768 MB
PCI: 00:00.0 10 <- [0x0000000000 - 0x000fffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x0010000000 - 0x0017ffffff] size 0x08000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x0018000000 - 0x00190fffff] size 0x01100000 gran 0x14 bus 01 mem
PCI: 01:00.0 10 <- [0x0018000000 - 0x0018ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 14 <- [0x0010000000 - 0x0017ffffff] size 0x08000000 gran 0x1b prefmem
PCI: 01:00.0 30 <- [0x0019000000 - 0x001901ffff] size 0x00020000 gran 0x11 romem
PNP: 03f0.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 03f0.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 03f0.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 03f0.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 03f0.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 03f0.1 74 drq size: 0x0000000001 not assigned in devicetree
PNP: 03f0.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 03f0.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 03f0.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 03f0.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 03f0.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 03f0.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 03f0.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 03f0.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
ERROR: PNP: 03f0.7 60 io size: 0x0000000001 not assigned in devicetree
ERROR: PNP: 03f0.7 62 io size: 0x0000000002 not assigned in devicetree
ERROR: PNP: 03f0.7 70 irq size: 0x0000000001 not assigned in devicetree
PCI: 00:04.1 20 <- [0x0000003000 - 0x000000300f] size 0x00000010 gran 0x04 io
PCI: 00:04.2 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 00:0b.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 00:0b.0 14 <- [0x0019120000 - 0x00191200ff] size 0x00000100 gran 0x08 mem
PCI: 00:0b.0 30 <- [0x0019100000 - 0x001911ffff] size 0x00020000 gran 0x11 romem
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 1 / 274 ms
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 009b
PCI: 00:01.0 cmd <- 07
PCI: 00:04.0 cmd <- 07
PCI: 00:04.1 cmd <- 01
PCI: 00:04.2 cmd <- 01
PCI: 00:04.3 cmd <- 01
PCI: 00:0b.0 cmd <- 03
PCI: 01:00.0 cmd <- 03
done.
BS: BS_DEV_ENABLE run times (exec / console): 0 / 22 ms
Initializing devices...
CPU_CLUSTER: 0 init
Initializing CPU #0
CPU: vendor Intel device 6b1
CPU: family 06, model 0b, stepping 01
Enabling cache
FMAP: area COREBOOT found @ 200 (261632 bytes)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 4080 size 14800
microcode: sig=0x6b1 pf=0x10 revision=0x0
microcode: updated to revision 0x1c date=2001-02-15
CPU: Intel(R) Celeron(TM) CPU                1400MHz.
MTRR: Physical address space:
0x0000000000000000 - 0x0000000010000000 size 0x10000000 type 0
0x0000000010000000 - 0x0000000018000000 size 0x08000000 type 1
0x0000000018000000 - 0x0000000019121000 size 0x01121000 type 0
0x0000000019121000 - 0x00000000ff800000 size 0xe66df000 type 6
0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 0
0x0000000100000000 - 0x0000040000000000 size 0x3ff00000000 type 6
MTRR: Fixed MSR 0x250 0x0000000000000000
MTRR: Fixed MSR 0x258 0x0000000000000000
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0000000000000000
MTRR: Fixed MSR 0x269 0x0000000000000000
MTRR: Fixed MSR 0x26a 0x0000000000000000
MTRR: Fixed MSR 0x26b 0x0000000000000000
MTRR: Fixed MSR 0x26c 0x0000000000000000
MTRR: Fixed MSR 0x26d 0x0000000000000000
MTRR: Fixed MSR 0x26e 0x0000000000000000
MTRR: Fixed MSR 0x26f 0x0000000000000000
CPU physical address size: 36 bits
MTRR: Removing WRCOMB type. WB/UC MTRR counts: 7/27 > 6.
MTRR: default type WB/UC MTRR counts: 7/26.
MTRR: WB selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000ff0000000 type 0
MTRR: 1 base 0x0000000010000000 mask 0x0000000ff8000000 type 0
MTRR: 2 base 0x0000000018000000 mask 0x0000000fff000000 type 0
MTRR: 3 base 0x0000000019000000 mask 0x0000000ffff00000 type 0
MTRR: 4 base 0x0000000019100000 mask 0x0000000ffffe0000 type 0
MTRR: 5 base 0x0000000019120000 mask 0x0000000ffffff000 type 0
Taking a reserved OS MTRR.
MTRR: 6 base 0x00000000ff800000 mask 0x0000000fff800000 type 0

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

CPU #0 initialized
CPU_CLUSTER: 0 init finished in 177 msecs
PCI: 00:00.0 init
PCI: 00:00.0 init finished in 0 msecs
PCI: 00:04.0 init
RTC Init
PCI: 00:04.0 init finished in 0 msecs
PCI: 00:04.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: on
IDE: Primary IDE interface, drive 1: UDMA/33: on
IDE: Secondary IDE interface, drive 0: UDMA/33: on
IDE: Secondary IDE interface, drive 1: UDMA/33: on
PCI: 00:04.1 init finished in 26 msecs
PCI: 00:04.2 init
PCI: 00:04.2 init finished in 0 msecs
PCI: 00:0b.0 init
PCI: 00:0b.0 init finished in 0 msecs
PCI: 01:00.0 init
PCI: 01:00.0 init finished in 0 msecs
PNP: 03f0.0 init
PNP: 03f0.0 init finished in 0 msecs
PNP: 03f0.1 init
PNP: 03f0.1 init finished in 0 msecs
PNP: 03f0.2 init
PNP: 03f0.2 init finished in 0 msecs
PNP: 03f0.3 init
PNP: 03f0.3 init finished in 0 msecs
PNP: 03f0.5 init
PNP: 03f0.5 init finished in 0 msecs
PNP: 03f0.7 init
PNP: 03f0.7 init finished in 0 msecs
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 3 / 271 ms
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
Copying Interrupt Routing Table to 0x000f0000... done.
Copying Interrupt Routing Table to 0x2ffab000... done.
PIRQ table: 160 bytes.
smbios_write_tables: 2ffaa000
SMBIOS: Unknown CPU
SMBIOS tables: 342 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum fe4
Writing coreboot table at 0x2ffac000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-000000002ffa9fff: RAM
 3. 000000002ffaa000-000000002ffb4fff: CONFIGURATION TABLES
 4. 000000002ffb5000-000000002ffd3fff: RAMSTAGE
 5. 000000002ffd4000-000000002fffffff: CONFIGURATION TABLES
 6. 0000000030000000-00000000ff7fffff: RAM
 7. 00000000ff800000-00000000ffffffff: RESERVED
 8. 0000000100000000-000003ffffffffff: RAM
FMAP: area COREBOOT found @ 200 (261632 bytes)
Wrote coreboot table at: 0x2ffac000, 0x284 bytes, checksum ed5b
coreboot table: 668 bytes.
IMD ROOT    0. 0x2ffff000 0x00001000
IMD SMALL   1. 0x2fffe000 0x00001000
CONSOLE     2. 0x2ffde000 0x00020000
TIME STAMP  3. 0x2ffdd000 0x00000910
ROMSTG STCK 4. 0x2ffdc000 0x00001000
AFTER CAR   5. 0x2ffd4000 0x00008000
RAMSTAGE    6. 0x2ffb4000 0x00020000
COREBOOT    7. 0x2ffac000 0x00008000
IRQ TABLE   8. 0x2ffab000 0x00001000
SMBIOS      9. 0x2ffaa000 0x00000800
IMD small region:
  IMD ROOT    0. 0x2fffec00 0x00000400
  FMAP        1. 0x2fffeb40 0x000000b6
BS: BS_WRITE_TABLES run times (exec / console): 0 / 126 ms
FMAP: area COREBOOT found @ 200 (261632 bytes)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 25400 size 17058
Checking segment from ROM address 0xfffe5638
Checking segment from ROM address 0xfffe5654
Loading segment from ROM address 0xfffe5638
  code (compression=0)
  New segment dstaddr 0x000e8fe0 memsize 0x17020 srcaddr 0xfffe5670 filesize 0x17020
Loading Segment: addr: 0x000e8fe0 memsz: 0x0000000000017020 filesz: 0x0000000000017020
it's not compressed!
Loading segment from ROM address 0xfffe5654
  Entry Point 0x000fcb00
BS: BS_PAYLOAD_LOAD run times (exec / console): 80 / 48 ms
Jumping to boot code at 0x000fcb00(0x2ffac000)
SeaBIOS (version 1.13.0-20200513_092016-tonchan.tondebuurincentral.com)
BUILD: gcc: (GCC) 9.2.1 20190827 (Red Hat 9.2.1-1) binutils: version 2.32-29.fc31
Attempting to find coreboot table
Found coreboot table forwarder.
Now attempting to find coreboot memory map
Add to e820 map: 00000000 00001000 2
Add to e820 map: 00001000 0009f000 1
Add to e820 map: 000c0000 2feea000 1
Add to e820 map: 2ffaa000 00056000 2
Add to e820 map: 30000000 cf800000 1
Add to e820 map: ff800000 00800000 2
Add to e820 map: 100000000 3ff00000000 1
Add to e820 map: 00000000 00004000 1
SeaBIOS (version 1.13.0-20200513_092016-tonchan.tondebuurincentral.com)
BUILD: gcc: (GCC) 9.2.1 20190827 (Red Hat 9.2.1-1) binutils: version 2.32-29.fc31
Found coreboot cbmem console @ 2ffde000
Found mainboard ASUS P3B-F
malloc preinit
Add to e820 map: 000a0000 00050000 -1
Add to e820 map: 000f0000 00010000 2
Add to e820 map: ff7c0000 00040000 2
phys_alloc zone=0x000f0d14 size=27808 align=20 ret=ff7b92a0 (detail=0xff7b9270)
Relocating init from 0x000ea100 to 0xff7b92a0 (size 27808)

Attachment: .config
Description: Binary data

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