Can you make use of the uImage/FIT [1] mechanism coreboot supports ? It just needs some architecture specific code.
Can you provide a ling to the Linux calling conventions for riscv ? [1] https://doc.coreboot.org/lib/payloads/fit.html Regards, Patrick On 2018-09-23 04:59 PM, ron minnich wrote: > ah sorry I forgot. > > I think selfboot could be reworked (and should be) to interpret "0" as > "somewhere useful"? > > On Sat, Sep 22, 2018 at 10:47 PM ron minnich <[email protected]> > wrote: > >> shouldn't we fix the riscv kernel build process? it's producing bad >> elf files? >> >> On Sat, Sep 22, 2018 at 4:40 PM Jonathan Neuschäfer >> <[email protected]> wrote: >> >>> Hi, >>> >>> we've discussed this briefly at OSFC: Linux's ELF file (vmlinux) >>> currently has segments starting at 0x0 (if you look at the >>> physical >>> address field) and an entry point at 0xffffffe000000000: >>> >>>> $ readelf -l vmlinux >>>> >>>> Elf file type is EXEC (Executable file) >>>> Entry point 0xffffffe000000000 >>>> There are 3 program headers, starting at offset 64 >>>> >>>> Program Headers: >>>> Type Offset VirtAddr PhysAddr >>>> FileSiz MemSiz Flags >>> Align >>>> LOAD 0x0000000000001000 0xffffffe000000000 >>> 0x0000000000000000 >>>> 0x000000000000ffce 0x000000000000ffce R E >>> 0x1000 >>>> LOAD 0x0000000000011000 0xffffffe000010000 >>> 0x0000000000010000 >>>> 0x00000000002cda3c 0x00000000002cda3c RWE >>> 0x1000 >>>> NOTE 0x00000000002dea00 0xffffffe0002dda00 >>> 0x00000000002dda00 >>>> 0x000000000000003c 0x000000000000003c R >>> 0x4 >>>> >>>> Section to Segment mapping: >>>> Segment Sections... >>>> 00 .init.text >>>> 01 .init.data .exit.text .data..percpu .text >>> .softirqentry.text .rodata __param __modver .srodata .data >>> __bug_table .sdata .bss __ex_table .notes >>>> 02 .notes >>> >>> coreboot's SELF loader rightly points out that 0x0 is not in RAM: >>> >>>> Loading segment from ROM address 0x00000000200287b8 >>>> code (compression=0) >>>> New segment dstaddr 0x0 memsize 0xffce srcaddr 0x2002880c >>> filesize 0xffce >>>> Loading segment from ROM address 0x00000000200287d4 >>>> code (compression=0) >>>> New segment dstaddr 0x10000 memsize 0x2cda3c srcaddr >>> 0x200387da filesize 0x2cda3c >>>> Loading segment from ROM address 0x00000000200287f0 >>>> Entry Point 0xffffffe000000000 >>>> SELF Payload doesn't target RAM: >>>> Failed Segment: 0x0, 65486 bytes >>>> 0. 0000000080000000-0000000080011fff: RAMSTAGE >>>> 1. 0000000080012000-000000008003ffff: RAM >>>> 2. 0000000080040000-0000000080044fff: RAMSTAGE >>>> 3. 0000000080045000-00000000fffdbfff: RAM >>>> 4. 00000000fffdc000-00000000ffffffff: CONFIGURATION TABLES >>>> 5. 0000000100000000-000000027fffffff: RAM >>>> Payload not loaded. >>> >>> How should we solve this? >>> >>> One option I see is to keep CONFIG_PAYLOAD_ELF as is, and add >>> quirks to >>> CONFIG_PAYLOAD_LINUX. >>> >>> Jonathan -- coreboot mailing list: [email protected] https://mail.coreboot.org/mailman/listinfo/coreboot
