Hi all I solve the issue, Because "SIRQEN" bit is not set. If the bit is not set, superio IRQ can't be trigger to braswell SOC. Thank you for the support.
2016-07-25 18:04 GMT+08:00 Nico Huber <[email protected]>: > Hi Cheng, > > On 25.07.2016 04:33, cheng yichen wrote: > > Hi all > > > > After i follow kontron/ktqm77 setting. I can't solve the issue. > > I try to change iqr(for com1) to 5 or 6. but system can't print linux > > message and minicom is not workable. > > Can you confirm that you see the full coreboot log on your UART? With > log level >= debug, it should end with lines about loading the payload, > containing a line starting with "Jumping to boot code at". > > If you see this line, it's unlikely to be a coreboot issue. If not, > please provide a full log with highest log level. Also the output of > `lspci -xxx`, `cbmem -c` and your devicetree.cb might be helpful. > > Another way to test the UART is to use Linux' earlycon driver, e.g. with > earlycon=uart8250,io,0x3f8,115200n8 in your kernel command line. This > driver is simpler than the serial8250 (it doesn't use interrupts and is > closer to what coreboot's driver does). > > Nico > > > > > > > > > dump from superiotool > > Found Winbond W83627DHG-P/-PT (id=0xb0, rev=0x73) at 0x2e > > Register dump: > > idx 02 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f > > val ff b0 73 ff 00 42 00 00 ff 50 80 00 00 eb 21 00 ff > > def 00 b0 NA ff 00 MM 00 MM RR 50 00 00 RR e2 21 00 00 > > LDN 0x00 (Floppy) > > idx 30 60 61 70 74 f0 f1 f2 f4 f5 > > val 01 03 f0 06 02 8e 00 ff 00 00 > > def 01 03 f0 06 02 8e 00 ff 00 00 > > LDN 0x01 (Parallel port) > > idx 30 60 61 70 74 f0 > > val 01 03 78 07 04 3f > > def 01 03 78 07 04 3f > > LDN 0x02 (COM1) > > idx 30 60 61 70 f0 > > val 01 03 f8 04 40 > > def 01 03 f8 04 00 > > LDN 0x03 (COM2) > > idx 30 60 61 70 f0 f1 > > val 01 02 f8 03 40 00 > > def 01 02 f8 03 00 00 > > LDN 0x05 (Keyboard) > > > > > > dump from dmesg > > > > home# dmesg | grep -i tty > > [ 0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-4.2.0-16-generic > > root=UUID=b2b7f7fa-b1db-4e97-941f-8aaee291f3dc ro console=tty1 > > console=ttyS0,115200n8 quiet splash vt.handoff=7 > > [ 0.000000] Kernel command line: > > BOOT_IMAGE=/boot/vmlinuz-4.2.0-16-generic > > root=UUID=b2b7f7fa-b1db-4e97-941f-8aaee291f3dc ro console=tty1 > > console=ttyS0,115200n8 quiet splash vt.handoff=7 > > [ 0.000000] console [tty1] enabled > > [ 0.000000] console [ttyS0] enabled > > [ 1.637664] 00:05: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) > is a > > 16550A > > [ 1.658835] serial8250: ttyS1 at I/O 0x2f8 (irq = 3, base_baud = > 115200) > > is a 16550A > > [ 3.412478] fbcon: Remapping primary device, fb1, to tty 1-63 > > [ 44.378835] systemd[1]: Created slice system-serial\x2dgetty.slice. > > [ 44.380198] systemd[1]: Created slice system-getty.slice. > > > > > > > > > > > > 2016-07-22 20:24 GMT+08:00 Kyösti Mälkki <[email protected]>: > > > >> On Fri, Jul 22, 2016 at 1:14 PM, cheng yichen <[email protected]> > >> wrote: > >>> Hi all > >>> > >>> My platform is braswell SOC with W83627dhg superIO. In post stage I can > >> get > >>> debug message over w83627 uart1(3f8/irq4). but after boot to linux, > uart > >>> port is not woarkable. I test the function by minicom but I can't > receive > >>> and send data. I can get uart information by dmesg command. > >>> How to initial it in corebooot? > >> > >> Does not sound like a coreboot issue to me. > >> > >> Do you have CTS/RTS hardware handshake disabled in minicom > >> configuration? If you directed kernel console to serial port, you > >> should not (cannot) use the port for user apps. > >> > >> HTH, > >> Kyösti > >> > > > > > > >
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