Kerry Sheh ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/451
-gerrit commit 1ba80c2a084e3403fc7ce06c487e0a97316b668e Author: Kerry Sheh <[email protected]> Date: Thu Dec 22 12:18:26 2011 +0800 F14 mainboard: mptable update Add GNB internal graphic interrupt, correct southbridge hd audio device interrupt. and remove the dead code already commented out. south_station, union_station, inagua, persimmon and e350m1 mainboard are included herein. Change-Id: Ic7618d80e0432ed0e22d1c16e1adb8ba6cea2e59 Signed-off-by: Kerry Sheh <[email protected]> Signed-off-by: Kerry Sheh <[email protected]> --- src/mainboard/amd/inagua/mptable.c | 10 +++++++--- src/mainboard/amd/persimmon/mptable.c | 8 +++++--- src/mainboard/amd/south_station/mptable.c | 8 +++++--- src/mainboard/amd/union_station/mptable.c | 8 +++++--- src/mainboard/asrock/e350m1/mptable.c | 8 +++++--- 5 files changed, 27 insertions(+), 15 deletions(-) diff --git a/src/mainboard/amd/inagua/mptable.c b/src/mainboard/amd/inagua/mptable.c index 7278936..73d946c 100644 --- a/src/mainboard/amd/inagua/mptable.c +++ b/src/mainboard/amd/inagua/mptable.c @@ -166,11 +166,15 @@ static void *smp_write_config_table(void *v) #define PCI_INT(bus, dev, int_sign, pin) \ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), apicid_sb800, (pin)) + /* APU Internal Graphic Device*/ + PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); + PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); + /* SMBUS */ PCI_INT(0x0, 0x14, 0x0, 0x10); - /* HD Audio */ - PCI_INT(0x0, 0x14, 0x0, intr_data[0x13]); + /* Southbridge HD Audio */ + PCI_INT(0x0, 0x14, 0x2, intr_data[0x13]); /* USB */ PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); @@ -179,7 +183,7 @@ static void *smp_write_config_table(void *v) PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - PCI_INT(0x0, 0x14, 0x2, intr_data[0x36]); + PCI_INT(0x0, 0x14, 0x5, intr_data[0x36]); /* sata */ PCI_INT(0x0, 0x11, 0x0, intr_data[0x40]); diff --git a/src/mainboard/amd/persimmon/mptable.c b/src/mainboard/amd/persimmon/mptable.c index 92c842f..18a7707 100644 --- a/src/mainboard/amd/persimmon/mptable.c +++ b/src/mainboard/amd/persimmon/mptable.c @@ -90,9 +90,13 @@ static void *smp_write_config_table(void *v) #define PCI_INT(bus, dev, fn, pin) #endif + /* APU Internal Graphic Device*/ + PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); + PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); + //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ PCI_INT(0x0, 0x14, 0x0, 0x10); - /* HD Audio: */ + /* Southbridge HD Audio: */ PCI_INT(0x0, 0x14, 0x2, 0x12); PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ @@ -105,8 +109,6 @@ static void *smp_write_config_table(void *v) /* sata */ PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - /* on board NIC & Slot PCIE. */ /* PCI slots */ diff --git a/src/mainboard/amd/south_station/mptable.c b/src/mainboard/amd/south_station/mptable.c index a3b4b5c..5c8ae5a 100644 --- a/src/mainboard/amd/south_station/mptable.c +++ b/src/mainboard/amd/south_station/mptable.c @@ -90,9 +90,13 @@ static void *smp_write_config_table(void *v) #define PCI_INT(bus, dev, fn, pin) #endif + /* APU Internal Graphic Device*/ + PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); + PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); + //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ PCI_INT(0x0, 0x14, 0x0, 0x10); - /* HD Audio: */ + /* Southbridge HD Audio: */ PCI_INT(0x0, 0x14, 0x2, 0x12); PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ @@ -105,8 +109,6 @@ static void *smp_write_config_table(void *v) /* sata */ PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - /* on board NIC & Slot PCIE. */ /* PCI slots */ diff --git a/src/mainboard/amd/union_station/mptable.c b/src/mainboard/amd/union_station/mptable.c index a3b4b5c..5c8ae5a 100644 --- a/src/mainboard/amd/union_station/mptable.c +++ b/src/mainboard/amd/union_station/mptable.c @@ -90,9 +90,13 @@ static void *smp_write_config_table(void *v) #define PCI_INT(bus, dev, fn, pin) #endif + /* APU Internal Graphic Device*/ + PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); + PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); + //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ PCI_INT(0x0, 0x14, 0x0, 0x10); - /* HD Audio: */ + /* Southbridge HD Audio: */ PCI_INT(0x0, 0x14, 0x2, 0x12); PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ @@ -105,8 +109,6 @@ static void *smp_write_config_table(void *v) /* sata */ PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - /* on board NIC & Slot PCIE. */ /* PCI slots */ diff --git a/src/mainboard/asrock/e350m1/mptable.c b/src/mainboard/asrock/e350m1/mptable.c index 960c2c8..de9d7f4 100644 --- a/src/mainboard/asrock/e350m1/mptable.c +++ b/src/mainboard/asrock/e350m1/mptable.c @@ -90,9 +90,13 @@ static void *smp_write_config_table(void *v) #define PCI_INT(bus, dev, fn, pin) #endif + /* APU Internal Graphic Device*/ + PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); + PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); + //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ PCI_INT(0x0, 0x14, 0x0, 0x10); - /* HD Audio: */ + /* Southbridge HD Audio: */ PCI_INT(0x0, 0x14, 0x2, 0x12); PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ @@ -105,8 +109,6 @@ static void *smp_write_config_table(void *v) /* sata */ PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - /* on board NIC & Slot PCIE. */ /* PCI slots */ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
