The "temp" will be used later. So it has to be calculated correctly.
 
Signed-off-by: Zheng Bao <[email protected]>



Index: src/northbridge/amd/amdht/h3ncmn.c
===================================================================
--- src/northbridge/amd/amdht/h3ncmn.c (revision 6512)
+++ src/northbridge/amd/amdht/h3ncmn.c (working copy)
@@ -565,7 +565,8 @@
 
  /* bits[15,13,12] specify the cores */
  /* Support Downcoring */
- cores = ((temp & 8) >> 1) + (temp & 3) + 1;
+ temp = ((temp & 8) >> 1) + (temp & 3);
+ cores = temp + 1;
  AmdPCIReadBits (MAKE_SBDFO(makePCISegmentFromNode(node),
      makePCIBusFromNode(node),
      makePCIDeviceFromNode(node),

The "temp" will be used later. So it has to be calculated correctly.

Signed-off-by: Zheng Bao <[email protected]>
Acked-by: 

Index: src/northbridge/amd/amdht/h3ncmn.c
===================================================================
--- src/northbridge/amd/amdht/h3ncmn.c  (revision 6512)
+++ src/northbridge/amd/amdht/h3ncmn.c  (working copy)
@@ -565,7 +565,8 @@
 
        /* bits[15,13,12] specify the cores */
        /* Support Downcoring */
-       cores = ((temp & 8) >> 1) + (temp & 3) + 1;
+       temp = ((temp & 8) >> 1) + (temp & 3);
+       cores = temp + 1;
        AmdPCIReadBits (MAKE_SBDFO(makePCISegmentFromNode(node),
                                        makePCIBusFromNode(node),
                                        makePCIDeviceFromNode(node),
-- 
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