On Tue, Jan 11, 2011 at 11:17:17PM -0500, Keith Hui wrote: >Hi all, > >Here is the new L2 cache patch. Sign-off in the patch itself. Still >very juicy and tasty at 25k. :D > >Also done is including cpu/intel/model_68x again in slot_1. Otherwise >it will die with a Coppermine P3 installed. > >My boot log on P2B-LS and a Katmai 600MHz attached. > >I have optimized it some more, and added more information and >meaningful constants as I cross checked the code with Intel's >documentation. Some debugging messages are different too. Give this a >good workout. > >Cheers >Keith
I applied this patch as well here, and compiles fine. NOTE: Although I tested execution and it doesn't appear to break anything, I have the Coppermine CPU's and not these specific CPU's. -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
