On Tue, Nov 02, 2010 at 10:43:08AM -0700, Dustin Harrison wrote: > Indeed, I enabled the ramtest and see failures starting at 0xCFE14 > which is inside the CAR space (DCACHE_RAM_SIZE is 0x8000 in my case > which should make the CAR range 0xC8000-0xCFFFF). My (naive) ideas > are that either writes are getting sent to the SDRAM which prevents > the raminit code from working or that CAR is not being > (successfully) disabled after raminit due to some unique feature of > this CPU. The reason I was asking about a method for validating the > CAR code for this CPU is because this CPU supports a feature to > share memory (for DMA purposes) with an accelerated services unit > (ASU). Thus I jumped to the conclusion that this may affect the CAR > routines.
Maybe. Can you post your patch for review and if possible the URL for the CPU datasheet? Thanks, Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
