On Mon, Oct 11, 2010 at 09:17:06AM -0600, Myles Watson wrote: > On Sun, Oct 10, 2010 at 9:48 PM, Liu Tao <[email protected]> wrote: > > Hello, > > > > the original code reads cpu ht speed from HT chain 0's register. > > the patch fix it to read the register from the chain which SB chip is on. > > > > Signed-off-by: Liu Tao <[email protected]> > Acked-by: Myles Watson <[email protected]>
Thanks, committed as r5958 with small changes as suggested: - Renamed sblk to sblink (the name of the register bits as per BIOS + Kernel Developer's Guide for AMD Athlon 64 & AMD Opteron Processors, chapter 3.3.8. - Made sblink an u32 instead of int. - Mention full name/description of sblink in a comment: "HyperTransport I/O Hub Link ID" Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
