SMC_CONFIG is needed before the device tree is ready and some people would rather not have mainboard settings like sio_gp1x_config in the device tree anyway. So found a nice united home for both in Kconfig, where users can change them without having to mess around in the C code.
Signed-off-by: Jens Rottmann <[email protected]> --- Patrick, BTW, what happened to your patch which made the struct mainboard_config work again? I don't remember it getting committed. I don't use it mainly because SMC_CONFIG is needed early and I perfer not scattering 2 options in different places, but I _do_ think the mainboard logic is a kind of device and might be part (root??) of the tree. So IMHO your patch which reenables this is a very good thing to have! Cheers, Jens --- src/mainboard/lippert/roadrunner-lx/Kconfig (rev 5758) +++ src/mainboard/lippert/roadrunner-lx/Kconfig (working copy) @@ -11,6 +11,8 @@ select PIRQ_ROUTE select UDELAY_TSC select CACHE_AS_RAM + # Standard chip is a 512 KB FWH. Replacing it with a 1 MB + # SST 49LF008A is possible. select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR @@ -29,4 +31,11 @@ hex default 0x4000 +config ONBOARD_UARTS_RS485 + bool "Switch on-board serial ports to RS485" + default n + help + If selected, both on-board serial ports will operate in RS485 mode + instead of RS232. + endif # BOARD_LIPPERT_ROADRUNNER_LX --- src/mainboard/lippert/roadrunner-lx/chip.h (rev 5758) +++ src/mainboard/lippert/roadrunner-lx/chip.h (working copy) @@ -18,13 +18,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* Based on chip.h from AMD's DB800 mainboard. */ - -#include <stdint.h> - extern struct chip_operations mainboard_ops; -struct mainboard_config { - /* bit5 = Live LED, bit2 = RS485_EN2, bit1 = RS485_EN1 */ - u8 sio_gp1x_config; -}; +struct mainboard_config {}; --- src/mainboard/lippert/roadrunner-lx/mainboard.c (rev 5758) +++ src/mainboard/lippert/roadrunner-lx/mainboard.c (working copy) @@ -29,6 +29,13 @@ #include <device/pci_ids.h> #include "chip.h" +/* Bit1 switches Com1 to RS485, bit2 same for Com2, bit5 turns off the Live LED. */ +#if CONFIG_ONBOARD_UARTS_RS485 + #define SIO_GP1X_CONFIG 0x26 +#else + #define SIO_GP1X_CONFIG 0x20 +#endif + static const u16 ec_init_table[] = { /* hi=data, lo=index */ 0x1900, /* Enable monitoring */ 0x0351, /* TMPIN1,2 diode mode, TMPIN3 off */ @@ -40,7 +47,6 @@ static void init(struct device *dev) { - struct mainboard_config *mb = dev->chip_info; unsigned int gpio_base, i; printk(BIOS_DEBUG, "LiPPERT RoadRunner-LX ENTER %s\n", __func__); @@ -61,7 +67,8 @@ outb(val >> 8, 0x0296); } - outb(mb->sio_gp1x_config, 0x1220); /* Simple-I/O GP17-10 */ + /* bit5 = Live LED, bit2 = RS485_EN2, bit1 = RS485_EN1 */ + outb(SIO_GP1X_CONFIG, 0x1220); /* Simple-I/O GP17-10 */ printk(BIOS_DEBUG, "LiPPERT RoadRunner-LX EXIT %s\n", __func__); } --- src/mainboard/lippert/roadrunner-lx/romstage.c (rev 5758) +++ src/mainboard/lippert/roadrunner-lx/romstage.c (working copy) @@ -132,4 +132,3 @@ /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; } - --- src/mainboard/lippert/spacerunner-lx/Kconfig (rev 5758) +++ src/mainboard/lippert/spacerunner-lx/Kconfig (working copy) @@ -12,6 +12,8 @@ select PIRQ_ROUTE select UDELAY_TSC select CACHE_AS_RAM + # Board is equipped with a 1 MB SPI flash, however, due to limitations + # of the IT8712F Super I/O, only the top 512 KB are directly mapped. select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR @@ -30,4 +32,17 @@ hex default 0x4000 +config ONBOARD_UARTS_RS485 + bool "Switch on-board serial ports to RS485" + default n + help + If selected, both on-board serial ports will operate in RS485 mode + instead of RS232. + +config ONBOARD_IDE_SLAVE + bool "Make on-board SSD act as Slave" + default n + help + If selected, the on-board SSD will act as IDE Slave instead of Master. + endif # BOARD_LIPPERT_SPACERUNNER_LX --- src/mainboard/lippert/spacerunner-lx/chip.h (rev 5758) +++ src/mainboard/lippert/spacerunner-lx/chip.h (working copy) @@ -18,13 +18,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* Based on chip.h from AMD's DB800 mainboard. */ - -#include <stdint.h> - extern struct chip_operations mainboard_ops; -struct mainboard_config { - /* bit2 = RS485_EN2, bit1 = RS485_EN1, bit0 = Live LED */ - u8 sio_gp1x_config; -}; +struct mainboard_config {}; --- src/mainboard/lippert/spacerunner-lx/mainboard.c (rev 5758) +++ src/mainboard/lippert/spacerunner-lx/mainboard.c (working copy) @@ -29,6 +29,13 @@ #include <device/pci_ids.h> #include "chip.h" +/* Bit0 turns off the Live LED, bit1 switches Com1 to RS485, bit2 same for Com2. */ +#if CONFIG_ONBOARD_UARTS_RS485 + #define SIO_GP1X_CONFIG 0x07 +#else + #define SIO_GP1X_CONFIG 0x01 +#endif + static const u16 ec_init_table[] = { /* hi=data, lo=index */ 0x1900, /* Enable monitoring */ 0x3050, /* VIN4,5 enabled */ @@ -41,7 +48,6 @@ static void init(struct device *dev) { - struct mainboard_config *mb = dev->chip_info; unsigned int gpio_base, i; printk(BIOS_DEBUG, "LiPPERT SpaceRunner-LX ENTER %s\n", __func__); @@ -65,7 +71,9 @@ outb(val >> 8, 0x0296); } - outb(mb->sio_gp1x_config, 0x1220); /* Simple-I/O GP17-10 */ + /* bit2 = RS485_EN2, bit1 = RS485_EN1, bit0 = Live LED */ + outb(SIO_GP1X_CONFIG, 0x1220); /* Simple-I/O GP17-10 */ + printk(BIOS_DEBUG, "LiPPERT SpaceRunner-LX EXIT %s\n", __func__); } --- src/mainboard/lippert/spacerunner-lx/romstage.c (rev 5758) +++ src/mainboard/lippert/spacerunner-lx/romstage.c (working copy) @@ -41,7 +41,11 @@ #include "superio/ite/it8712f/it8712f_early_serial.c" /* Bit0 enables Spread Spectrum, bit1 makes on-board SSD act as IDE slave. */ -#define SMC_CONFIG 0x01 +#if CONFIG_ONBOARD_IDE_SLAVE + #define SMC_CONFIG 0x03 +#else + #define SMC_CONFIG 0x01 +#endif #define ManualConf 1 /* No automatic strapped PLL config */ #define PLLMSRhi 0x0000059C /* Manual settings for the PLL */ @@ -201,4 +205,3 @@ /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; } - _ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
