On 11/30/2009 09:39 PM, Scott.Hsiao wrote:
Hello! Joseph,
Yes, the process stopped at same place everytime.
Completed log is attatched.
Scott Hsiao
-----Original Message-----
From: Joseph Smith [mailto:[email protected]]
Sent: Tuesday, December 01, 2009 10:31 AM
To: Scott.Hsiao
Cc: [email protected]
Subject: Re: [coreboot] Atom platform porting problem.
On 11/30/2009 03:29 AM, Scott.Hsiao wrote:
I am porting coreboot to a Intel Atom based mainboard which
incorperate atom (N270) + 945GSE + it8718f.
The initial progress of north bridge seems okay but I got error in the
"dev_initialize" function.
Here are the partial output:
....
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
malloc Enter, size 91, free_mem_ptr 0013b998 malloc 0013b998
start_eip=0x0000a000, offset=0x00100000, code_size=0x0000005b
Initializing SMM handler... ... pmbase = 0x0500
SMI_STS: PM1
PM1_STS: WAK PWRBTN TMROF
GPE0_STS:
TCO_STS:
... raise SMI#
Initializing CPU #0
CPU: vendor Intel device 106c2
CPU: family 06, model 1c, stepping 02
Using generic cpu ops (good)
Enabling cache
microcode_info: sig = 0x000106c2 pf=0x00000004 rev = 0x00000000
CPU: Intel(R) Core(TM) CPU N270 @ 1.60GHz.
Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
call enable_fixed_mtrr()
Setting variable MTRR 0, base: 0MB, range: 512MB, type WB
ADDRESS_MASK_HIGH=0xf Unexpected Exception: 13 @ 10:001025e9 - Halting
Code: 0 eflags: 00010002
eax: e0000800 ebx: 0000000f ecx: 00000201 edx: 0000000f
edi: e0000000 esi: 00000000 ebp: 0000000f esp: 00139df4
Hello Scott,
Could you send me your whole boot log?
Are you getting the Unexpected Exception errors in the same place every
boot? Or, is it in a different spot each time?
Wow it looks like you are getting pretty far in the boot process,
congrats :-) I think there may be something wrong with how the MTRRs
are setup. I think you are supposed to have more than one variable MTRR?
My suggestion would be to get inteltool working on the board, and then
you can tell what the MTRRs look like with the vender bios and compare
it with your code. I hope that helps.
--
Thanks,
Joseph Smith
Set-Top-Linux
www.settoplinux.org
--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot
