Hi,

Old the onboard pci driver is still seems to be needed as a dummy driver.
On RS690 based system like dbm690t and pistachio, linux kernel is
halted on scan PCI bus below 00:14:04 node.

This patch is tested under linux kernel version 2.6.37.36.
See attached patches.

jaagar
diff -uNr coreboot-a/src/mainboard/amd/pistachio/Config.lb coreboot-b/src/mainboard/amd/pistachio/Config.lb
--- coreboot-a/src/mainboard/amd/pistachio/Config.lb	2009-11-25 00:34:31.000000000 +0900
+++ coreboot-b/src/mainboard/amd/pistachio/Config.lb	2009-11-25 13:09:22.000000000 +0900
@@ -156,7 +156,9 @@
 					device pci 0.0 on end # HT  	0x7910
 				#	device pci 0.1 off end # CLK
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
-						device pci 5.0 on end	# Internal Graphics 0x791F
+						chip drivers/pci/onboard
+							device pci 5.0 on end	# Internal Graphics 0x791F
+						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
 					device pci 3.0 off end # PCIE P2P bridge	0x791b
diff -uNr coreboot-a/src/mainboard/amd/pistachio/devicetree.cb coreboot-b/src/mainboard/amd/pistachio/devicetree.cb
--- coreboot-a/src/mainboard/amd/pistachio/devicetree.cb	2009-11-25 00:34:31.000000000 +0900
+++ coreboot-b/src/mainboard/amd/pistachio/devicetree.cb	2009-11-25 13:09:39.000000000 +0900
@@ -21,7 +21,9 @@
 					device pci 0.0 on end # HT  	0x7910
 				#	device pci 0.1 off end # CLK
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
-						device pci 5.0 on end	# Internal Graphics 0x791F
+						chip drivers/pci/onboard
+							device pci 5.0 on end	# Internal Graphics 0x791F
+						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
 					device pci 3.0 off end # PCIE P2P bridge	0x791b

diff -uNr coreboot-a/src/drivers/pci/Makefile.inc coreboot-b/src/drivers/pci/Makefile.inc
--- coreboot-a/src/drivers/pci/Makefile.inc	1970-01-01 09:00:00.000000000 +0900
+++ coreboot-b/src/drivers/pci/Makefile.inc	2009-08-13 13:11:11.000000000 +0900
@@ -0,0 +1 @@
+subdirs-y += onboard
diff -uNr coreboot-a/src/drivers/pci/onboard/chip.h coreboot-b/src/drivers/pci/onboard/chip.h
--- coreboot-a/src/drivers/pci/onboard/chip.h	1970-01-01 09:00:00.000000000 +0900
+++ coreboot-b/src/drivers/pci/onboard/chip.h	2009-07-13 14:29:51.000000000 +0900
@@ -0,0 +1,11 @@
+#ifndef PCI_ONBOARD_H
+#define PCI_ONBOARD_H
+
+struct drivers_pci_onboard_config 
+{
+       unsigned long rom_address;
+};
+struct chip_operations;
+extern struct chip_operations drivers_pci_onboard_ops;
+
+#endif 
diff -uNr coreboot-a/src/drivers/pci/onboard/Config.lb coreboot-b/src/drivers/pci/onboard/Config.lb
--- coreboot-a/src/drivers/pci/onboard/Config.lb	1970-01-01 09:00:00.000000000 +0900
+++ coreboot-b/src/drivers/pci/onboard/Config.lb	2009-07-13 14:29:51.000000000 +0900
@@ -0,0 +1,4 @@
+config chip.h
+
+object onboard.o
+
diff -uNr coreboot-a/src/drivers/pci/onboard/Makefile.inc coreboot-b/src/drivers/pci/onboard/Makefile.inc
--- coreboot-a/src/drivers/pci/onboard/Makefile.inc	1970-01-01 09:00:00.000000000 +0900
+++ coreboot-b/src/drivers/pci/onboard/Makefile.inc	2009-08-13 13:11:11.000000000 +0900
@@ -0,0 +1 @@
+obj-y += onboard.o
diff -uNr coreboot-a/src/drivers/pci/onboard/onboard.c coreboot-b/src/drivers/pci/onboard/onboard.c
--- coreboot-a/src/drivers/pci/onboard/onboard.c	1970-01-01 09:00:00.000000000 +0900
+++ coreboot-b/src/drivers/pci/onboard/onboard.c	2009-11-25 07:55:32.000000000 +0900
@@ -0,0 +1,77 @@
+/*
+ * Copyright 2004 Tyan Computer
+ *  by [email protected]
+ */
+
+#include <console/console.h>
+
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include "chip.h"
+
+/*
+ * How to use the onboard device driver for option rom execution:
+ *
+ * 1. You need to add the driver to your mainboard Config.lb:
+ *
+ *      chip drivers/pci/onboard
+ *	    device pci x.0 on end
+ *          register "rom_address" = "0xfff80000"
+ *      end
+ * 2. Reduce the size of your normal (or fallback) image, by adding the
+ *    following lines to your target Config.lb, after romimage "normal"
+ *      # 48K for SCSI FW or ATI ROM
+ *      option CONFIG_ROM_SIZE = 512*1024-48*1024
+ * 3. Create your vgabios.bin, for example using awardeco and put it in the
+ *    directory of your target Config.lb. You can also read an option rom from
+ *    a running system, but this is unreliable, as some option roms are changed
+ *    during execution:
+ *      #  dd if=/dev/mem of=atix.rom skip=1536 count=96
+ * 4. After you built coreboot.rom, attach the option rom to your coreboot
+ *    image:
+ *      # cat ../atix.rom ./normal/coreboot.rom ./fallback/coreboot.rom > coreboot.rom
+ *
+ * Alternatively you can use the following script "nsxv" to build your image
+ * Usage:
+ * # ./nsxv s2850
+ *
+ *     #!/bin/bash
+ *     MBVENDOR=tyan
+ *     MBMODEL=$1
+ *     LBROOT=/home/yhlu/xx/xx
+ *
+ *     echo $1
+ *     date
+ *
+ *     cd "$LBROOT/freebios2/targets"
+ *     rm -rf "$MBVENDOR/$MBMODEL/$MBMODEL"
+ *     ./buildtarget "$MBVENDOR/$MBMODEL" &> "$LBROOT/x_b.txt"
+ *     cd "$MBVENDOR/$MBMODEL/$MBMODEL"
+ *     #make clean
+ *     eval make &> "$LBROOT/x_m.txt"
+ *             if [ $? -eq 0 ]; then
+ *                     echo "ok."
+ *             else
+ *                     echo "FAILED! Log excerpt:"
+ *                     tail -n 15 "$LBROOT/x_m.txt"
+ *                     exit
+ *             fi
+ *     cat ../atix.rom ./normal/coreboot.rom ./fallback/coreboot.rom > "$LBROOT/rom/"$MBMODEL"_coreboot.rom"
+ *     cp -f "$LBROOT/rom/"$MBMODEL"_coreboot.rom" /home/yhlu/
+ *
+ *     date
+ *
+ */
+
+static void onboard_enable(device_t dev)
+{
+	struct drivers_pci_onboard_config *conf;
+        conf = dev->chip_info;
+}
+
+struct chip_operations drivers_pci_onboard_ops = {
+	CHIP_NAME("Onboard PCI")
+	.enable_dev = onboard_enable,
+};

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