I  already run coreboot on my system.
The problem is that my linux started from coreboot
i very slow (comparing to the original BIOS)

I have no idea where might be the problem.

I'm attaching the irq_tables.c and output.txt
you requested.
(all generated with the original BIOS)


the superio is a  NSC PC87364
but coreboot works with your PC87360 implementation.
it is a uniprocessor PIII platform.

I tried to boot the system with a:
Pentium 3 733MHz, and
Celeron 400MHz

the coreboot booted linux works slow
with both processors.

Best regards.
Paweł Stawicki

2009/10/18 Uwe Hermann <[email protected]>

> Hi,
>
> On Wed, Oct 14, 2009 at 11:38:44PM +0200, Paweł Stawicki wrote:
> > I'm very new to coreboot.
> > I'm trying to boot my old hp eVectra with coreboot (because my old bios
> > don't   support VIA c3 processor)
> >
> > It took me some time to understand why my onboard VGA card don't starts,
> > but now it works :-)
> >
> > Now I have a new problem.
> > My linux distribution boots very slow (approximately 30 minutes - to the
> > login prompt).
> > I found this mail:  [PATCH] Initial support for the MSI MS-6178
> > (i810-based)<
> http://news.gmane.org/find-root.php?message_id=%3c20070831091956.GA9039%40greenwood%3e
> >
> > From: Uwe Hermann
> > with the same problem
> > but I could not find the solution in the mailing thread.
>
> Do you already run coreboot on the board? Or do you want to add support?
>
> Either way, please send the following information so we can support it:
>
>  * lspci -tvnn
>  * superiotool -dV
>  * getpir output (a file named irq_table.c)
>  * mptable output
>
> You can get the utilities via:
>
>  svn co svn://coreboot.org/repos/trunk/util
>
>
> Thanks, Uwe.
> --
> http://www.hermann-uwe.de  | http://www.randomprojects.org
> http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
>
gucio:~/bios/utils/mptable# lspci -tvnn
-[0000:00]-+-00.0  Intel Corporation 82810E DC-133 GMCH [Graphics Memory 
Controller Hub] [8086:7124]
           +-01.0  Intel Corporation 82810E DC-133 CGC [Chipset Graphics 
Controller] [8086:7125]
           +-1e.0-[0000:01]----02.0  3Com Corporation 3c905C-TX/TX-M [Tornado] 
[10b7:9200]
           +-1f.0  Intel Corporation 82801AA ISA Bridge (LPC) [8086:2410]
           +-1f.1  Intel Corporation 82801AA IDE [8086:2411]
           +-1f.2  Intel Corporation 82801AA USB [8086:2412]
           +-1f.3  Intel Corporation 82801AA SMBus [8086:2413]
           \-1f.5  Intel Corporation 82801AA AC'97 Audio [8086:2415]
gucio:~/bios/utils/mptable# 
gucio:~/bios/utils/superiotool#
gucio:~/bios/utils/superiotool#
gucio:~/bios/utils/superiotool#
gucio:~/bios/utils/superiotool#
gucio:~/bios/utils/superiotool#
gucio:~/bios/utils/superiotool#
gucio:~/bios/utils/superiotool# ./superiotool -dV
superiotool r
Probing for ALi Super I/O at 0x3f0...
  Failed. Returned data: id=0xffff, rev=0xff
Probing for ALi Super I/O at 0x370...
  Failed. Returned data: id=0xffff, rev=0xff
Probing for Fintek Super I/O at 0x2e...
  Failed. Returned data: vid=0x0587, id=0x11e4
Probing for Fintek Super I/O at 0x4e...
  Failed. Returned data: vid=0xffff, id=0xffff
Probing for ITE Super I/O (init=standard) at 0x2e...
  Failed. Returned data: id=0xe411, rev=0xc
Probing for ITE Super I/O (init=it8761e) at 0x2e...
  Failed. Returned data: id=0xe411, rev=0xc
Probing for ITE Super I/O (init=it8228e) at 0x2e...
  Failed. Returned data: id=0xe411, rev=0xc
Probing for ITE Super I/O (init=0x87,0x87) at 0x2e...
  Failed. Returned data: id=0xe411, rev=0xc
Probing for ITE Super I/O (init=standard) at 0x4e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8761e) at 0x4e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8228e) at 0x4e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=0x87,0x87) at 0x4e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=legacy/it8661f) at 0x370...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=legacy/it8671f) at 0x370...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for NSC Super I/O at 0x2e...
Found NSC PC87364 (sid=0xe4, srid=0x0b) at 0x2e
No dump available for this Super I/O
Probing for NSC Super I/O at 0x4e...
  Failed. Returned data: port=0xff, port+1=0xff
Probing for NSC Super I/O at 0x15c...
  Failed. Returned data: port=0xff, port+1=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e...
  Failed. Returned data: id=0xe4, rev=0x11
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e...
  Failed. Returned data: id=0x00, rev=0x00
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370...
  Failed. Returned data: id=0xff, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x2e...
  Failed. Returned data: id/oldid=0xe4/0x00, rev=0x11
Probing for Winbond Super I/O (init=0x89) at 0x2e...
  Failed. Returned data: id/oldid=0xe4/0x00, rev=0x11
Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e...
  Failed. Returned data: id/oldid=0xe4/0x00, rev=0x11
Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e...
  Failed. Returned data: id/oldid=0xe4/0x00, rev=0x11
Probing for Winbond Super I/O (init=0x88) at 0x4e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x4e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x3f0...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x3f0...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x370...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x370...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x370...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x370...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x250...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x250...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x250...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x250...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
gucio:~/bios/utils/superiotool# 
gucio:~/bios/utils/mptable#
gucio:~/bios/utils/mptable#
gucio:~/bios/utils/mptable#
gucio:~/bios/utils/mptable#
gucio:~/bios/utils/mptable#
gucio:~/bios/utils/mptable#
gucio:~/bios/utils/mptable#
gucio:~/bios/utils/mptable#
gucio:~/bios/utils/mptable# ./mptable 
/* generated by MPTable, version 2.0.15*/
/* as modified by RGM for coreboot */
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <string.h>
#include <stdint.h>

void *smp_write_config_table(void *v)
{
        static const char sig[4] = "PCMP";
        static const char oem[8] = "LNXI    ";
        static const char productid[12] = "P4DPE       ";
        struct mp_config_table *mc;

        mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
        memset(mc, 0, sizeof(*mc));

        memcpy(mc->mpc_signature, sig, sizeof(sig));
        mc->mpc_length = sizeof(*mc); /* initially just the header */
        mc->mpc_spec = 0x04;
        mc->mpc_checksum = 0; /* not yet computed */
        memcpy(mc->mpc_oem, oem, sizeof(oem));
        memcpy(mc->mpc_productid, productid, sizeof(productid));
        mc->mpc_oemptr = 0;
        mc->mpc_oemsize = 0;
        mc->mpc_entry_count = 0; /* No entries yet... */
        mc->mpc_lapic = LAPIC_ADDR;
        mc->mpe_length = 0;
        mc->mpe_checksum = 0;
        mc->reserved = 0;

        smp_write_processors(mc);



 MP FPS NOT found,
 suggest trying -grope option!!!

gucio:~/bios/utils/mptable# 
/*
 * This file is part of the coreboot project.
 *
 * Copyright (C) 200x TODO <t...@todo>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 */

#ifdef GETPIR			/* TODO: Drop this when copying to coreboot. */
#include "pirq_routing.h"	/* TODO: Drop this when copying to coreboot. */
#else				/* TODO: Drop this when copying to coreboot. */
#include <arch/pirq_routing.h>
#endif				/* TODO: Drop this when copying to coreboot. */

const struct irq_routing_table intel_irq_routing_table = {
	PIRQ_SIGNATURE,		/* u32 signature */
	PIRQ_VERSION,		/* u16 version */
	32 + 16 * 3,		/* Max. number of devices on the bus */
	0x00,			/* Interrupt router bus */
	(0x1f << 3) | 0x0,	/* Interrupt router dev */
	0,			/* IRQs devoted exclusively to PCI usage */
	0x8086,			/* Vendor */
	0x2410,			/* Device */
	0,			/* Miniport */
	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
	0x59,			/* Checksum (has to be set to some value that
				 * would give 0 after the sum of all bytes
				 * for this structure (including checksum).
                                 */
	{
		/* bus,        dev | fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
		{0x00, (0x01 << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}}, 0x0, 0x0},
		{0x00, (0x1e << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0},
		{0x00, (0x1f << 3) | 0x0, {{0xfe, 0x4000}, {0x61, 0xdeb8}, {0x00, 0x0000}, {0x63, 0xdeb8}}, 0x0, 0x0},
	}
};

unsigned long write_pirq_routing_table(unsigned long addr)
{
	return copy_pirq_routing_table(addr);
}
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