1. We have disabled the display controller. 2. How is the region reserved? What can we do?
Sorry, I didn't trace the roadmap of HIGH_TABLE and have no idea about what happened. I really need more help to solve this issue. Joe -----Original Message----- From: Myles Watson [mailto:[email protected]] Sent: Friday, May 15, 2009 8:40 PM To: Bao, Zheng; 'Patrick Georgi' Cc: 'coreboot' Subject: RE: [coreboot] [PATCH] Table code cleanup > -----------output with HAVE_HIGH_TABLES ------------------ > High Tables Base is 7fff0000. > Writing IRQ routing tables to 0x7fff0000...write_pirq_routing_table ... > rom_table_end = 0x7fff38d0 > Adjust low_table_end from 0x00000818 to 0x00001000 > Adjust rom_table_end from 0x7fff38d0 to 0x80000000 > Adding high table area > uma_memory_start=0x78000000, uma_memory_size=0x0 Maybe the problem is the UMA memory area? Is the size really zero? We need to fix this message and/or the UMA code. It looks like ACPI and UMA overlap. > Wrote coreboot table at: 7fff38d0 - 7fff3ac8 checksum 4b5b >From your earlier email: > [ 0.000000] BIOS-provided physical RAM map: > [ 0.000000] BIOS-e820: 0000000000000000 - 00000000000a0000 (usable) > [ 0.000000] BIOS-e820: 0000000000100000 - 0000000004000000 (usable) > [ 0.000000] end_pfn_map = 16384 I don't see any reserved regions. Do reserved regions show up when it works? Thanks, Myles -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
