Author: hailfinger Date: 2009-05-14 14:59:36 +0200 (Thu, 14 May 2009) New Revision: 507
Modified: trunk/dummyflasher.c trunk/flash.h trunk/spi.c Log: Add a dummy SPI controller driver, similar to the dummy LPC/FWH/Parallel flasher driver. Does not support reading or writing the fake chip yet. flashrom --programmer dummy also enables the dummy SPI controller driver. Testing the dummy SPI driver revealed a RDID debug printing bug in the SPI core. Fix that as well. Signed-off-by: Carl-Daniel Hailfinger <[email protected]> Acked-by: Uwe Hermann <[email protected]> Modified: trunk/dummyflasher.c =================================================================== --- trunk/dummyflasher.c 2009-05-14 12:41:00 UTC (rev 506) +++ trunk/dummyflasher.c 2009-05-14 12:59:36 UTC (rev 507) @@ -31,6 +31,7 @@ int dummy_init(void) { printf_debug("%s\n", __func__); + flashbus = BUS_TYPE_DUMMY_SPI; return 0; } @@ -86,3 +87,23 @@ return 0xffffffff; } +int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + int i; + + printf_debug("%s:", __func__); + + printf_debug(" writing %u bytes:", writecnt); + for (i = 0; i < writecnt; i++) + printf_debug(" 0x%02x", writearr[i]); + + printf_debug(" reading %u bytes:", readcnt); + for (i = 0; i < readcnt; i++) { + printf_debug(" 0xff"); + readarr[i] = 0xff; + } + + printf_debug("\n"); + return 0; +} Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-05-14 12:41:00 UTC (rev 506) +++ trunk/flash.h 2009-05-14 12:59:36 UTC (rev 507) @@ -571,7 +571,8 @@ BUS_TYPE_IT87XX_SPI, BUS_TYPE_SB600_SPI, BUS_TYPE_VIA_SPI, - BUS_TYPE_WBSIO_SPI + BUS_TYPE_WBSIO_SPI, + BUS_TYPE_DUMMY_SPI } flashbus_t; extern flashbus_t flashbus; @@ -602,6 +603,8 @@ uint8_t dummy_chip_readb(const volatile void *addr); uint16_t dummy_chip_readw(const volatile void *addr); uint32_t dummy_chip_readl(const volatile void *addr); +int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); /* nic3com.c */ int nic3com_init(void); Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-05-14 12:41:00 UTC (rev 506) +++ trunk/spi.c 2009-05-14 12:59:36 UTC (rev 507) @@ -46,6 +46,8 @@ return sb600_spi_command(writecnt, readcnt, writearr, readarr); case BUS_TYPE_WBSIO_SPI: return wbsio_spi_command(writecnt, readcnt, writearr, readarr); + case BUS_TYPE_DUMMY_SPI: + return dummy_spi_command(writecnt, readcnt, writearr, readarr); default: printf_debug ("%s called, but no SPI chipset/strapping detected\n", @@ -58,12 +60,15 @@ { const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; int ret; + int i; ret = spi_command(sizeof(cmd), bytes, cmd, readarr); if (ret) return ret; - printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], - readarr[2]); + printf_debug("RDID returned"); + for (i = 0; i < bytes; i++) + printf_debug(" 0x%02x", readarr[i]); + printf_debug("\n"); return 0; } @@ -202,6 +207,7 @@ case BUS_TYPE_VIA_SPI: case BUS_TYPE_SB600_SPI: case BUS_TYPE_WBSIO_SPI: + case BUS_TYPE_DUMMY_SPI: return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n"); -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
