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https://issues.apache.org/jira/browse/HADOOP-19666?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel
]
Lei Wen updated HADOOP-19666:
-----------------------------
Description:
This PR implements vector-accelerated CRC32 using the RISC-V V, Zbc and Zvbc
instruction sets, with full functional verification and performance testing
completed.
The implementation uses the vclmul.v and vclmulh.v (carry-less multiply)
instructions for data folding and computes the final checksum via Barrett
reduction.
Key Features:
1. Runtime Hardware Detection
The PR uses kernel hardware probing and cpuinfo parsing to dynamically detect
hardware support for CRC32 acceleration (via v, zbc, and zvbc extensions) at
runtime.
2. Performance Improvement
Hardware-accelerated CRC32 achieves a performance boost of over *3x* compared
to the software implementation.
was:
This PR implements vector-accelerated CRC32 using the RISC-V V, Zbc and Zvbc
instruction sets, with full functional verification and performance testing
completed.
The implementation uses the vclmul.v and vclmulh.v (carry-less multiply)
instructions for data folding and computes the final checksum via Barrett
reduction.
Key Features:
1. Runtime Hardware Detection
The PR uses kernel hardware probing and cpuinfo parsing to dynamically detect
hardware support for CRC32 acceleration (via v, zbc, and zvbc extensions) at
runtime.
2. Performance Improvement
Hardware-accelerated CRC32 achieves a performance boost of over 3x compared to
the software implementation.
> Add hardware-accelerated CRC32 support for riscv64 using the v,zbc,zvbc
> extension
> ---------------------------------------------------------------------------------
>
> Key: HADOOP-19666
> URL: https://issues.apache.org/jira/browse/HADOOP-19666
> Project: Hadoop Common
> Issue Type: Improvement
> Components: native
> Affects Versions: 3.4.1
> Reporter: Lei Wen
> Priority: Major
>
> This PR implements vector-accelerated CRC32 using the RISC-V V, Zbc and Zvbc
> instruction sets, with full functional verification and performance testing
> completed.
> The implementation uses the vclmul.v and vclmulh.v (carry-less multiply)
> instructions for data folding and computes the final checksum via Barrett
> reduction.
> Key Features:
> 1. Runtime Hardware Detection
> The PR uses kernel hardware probing and cpuinfo parsing to dynamically detect
> hardware support for CRC32 acceleration (via v, zbc, and zvbc extensions) at
> runtime.
> 2. Performance Improvement
> Hardware-accelerated CRC32 achieves a performance boost of over *3x* compared
> to the software implementation.
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