raiden00pl commented on code in PR #8945:
URL: https://github.com/apache/nuttx/pull/8945#discussion_r1155572371


##########
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c:
##########
@@ -866,30 +885,25 @@ void stm32_stdclockconfig(void)
         {
         }
 
-      /* Over-drive is needed if
-       *  - Voltage output scale 1 mode is selected and SYSCLK frequency is
-       *    over 400 MHz.
-       */
+#if STM32_VOS_OVERDRIVE && (STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_1)
+      /* Over-drive support for VOS1 */
 
-      if ((STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_1) &&
-           STM32_SYSCLK_FREQUENCY > 400000000)
-        {
-          /* Enable System configuration controller clock to Enable ODEN */
+      /* Enable System configuration controller clock to Enable ODEN */

Review Comment:
   This problem is not related to SYSCLK frequency. I run uc with 
SYSCLK=400MHz, but somehow overdrive is required for external ULPI even if I 
don't set the maximum frequency. I submitted a ticket for ST support, maybe 
they can tell something more about it. But I'm afraid they won't say anything, 
there are threads on their forum where ST aren't very willing to help in ULPI's 
matters. The entire STM32 OTGHS IP block (from Synopsys) is a garbage :)



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