[nuttx] 01/02: arch/risc-v: Set Supervisor User Memory (access) for idle process too

[acassis]

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acassis pushed a commit to branch master
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commit fc44cbdbdbdf76fb75e7ad39d20e8b86e1f3c691
Author: Ville Juven <ville.ju...@unikie.com>
AuthorDate: Tue Mar 28 13:57:08 2023 +0300

    arch/risc-v: Set Supervisor User Memory (access) for idle process too
    
    This has been a long issue for me as it results in random crashes when
    asynchronous events occur when the idle process is active.
    
    The problem is that the kernel cannot access user memory, because the CPU
    status prevents it.
---
 arch/risc-v/src/common/riscv_getnewintctx.c | 9 +++++++++
 arch/risc-v/src/common/riscv_initialstate.c | 4 ++++
 arch/risc-v/src/common/riscv_internal.h     | 1 +
 3 files changed, 14 insertions(+)

diff --git a/arch/risc-v/src/common/riscv_getnewintctx.c 
b/arch/risc-v/src/common/riscv_getnewintctx.c
index f1fa4cf3de..2588ff2841 100644
--- a/arch/risc-v/src/common/riscv_getnewintctx.c
+++ b/arch/risc-v/src/common/riscv_getnewintctx.c
@@ -70,3 +70,12 @@ uintptr_t riscv_get_newintctx(void)
 #endif
   );
 }
+
+void riscv_set_idleintctx(void)
+{
+  /* Set SUM for idle process if needed */
+
+#ifdef CONFIG_ARCH_USE_MMU
+  SET_CSR(CSR_STATUS, STATUS_SUM);
+#endif
+}
diff --git a/arch/risc-v/src/common/riscv_initialstate.c 
b/arch/risc-v/src/common/riscv_initialstate.c
index 3c2b5f00e7..802c2103d7 100644
--- a/arch/risc-v/src/common/riscv_initialstate.c
+++ b/arch/risc-v/src/common/riscv_initialstate.c
@@ -78,6 +78,10 @@ void up_initial_state(struct tcb_s *tcb)
 
       riscv_stack_color(tcb->stack_alloc_ptr, 0);
 #endif /* CONFIG_STACK_COLORATION */
+
+      /* Set idle process' initial interrupt context */
+
+      riscv_set_idleintctx();
       return;
     }
 
diff --git a/arch/risc-v/src/common/riscv_internal.h 
b/arch/risc-v/src/common/riscv_internal.h
index fbfa3f12fa..a6602b06aa 100644
--- a/arch/risc-v/src/common/riscv_internal.h
+++ b/arch/risc-v/src/common/riscv_internal.h
@@ -200,6 +200,7 @@ void riscv_copystate(uintptr_t *dest, uintptr_t *src);
 void riscv_sigdeliver(void);
 int riscv_swint(int irq, void *context, void *arg);
 uintptr_t riscv_get_newintctx(void);
+void riscv_set_idleintctx(void);
 void riscv_exception_attach(void);
 
 #ifdef CONFIG_ARCH_FPU