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commit 8a412ba59b77609df8fe36c4ad8d758e1f9d4305
Author: David Sidrane <david.sidr...@nscdg.com>
AuthorDate: Wed Dec 14 02:21:24 2022 -0800

    s32k1xx:Refactor DMAMUX for s32k11x, s32k14x
---
 .../{s32k146_dmamux.h => s32k11x_dmamux.h}         | 32 +++-------------------
 .../{s32k146_dmamux.h => s32k14x_dmamux.h}         | 13 +++------
 arch/arm/src/s32k1xx/hardware/s32k1xx_dmamux.h     |  4 +--
 3 files changed, 10 insertions(+), 39 deletions(-)

diff --git a/arch/arm/src/s32k1xx/hardware/s32k146_dmamux.h 
b/arch/arm/src/s32k1xx/hardware/s32k11x_dmamux.h
similarity index 65%
copy from arch/arm/src/s32k1xx/hardware/s32k146_dmamux.h
copy to arch/arm/src/s32k1xx/hardware/s32k11x_dmamux.h
index 0c8480fa27..9a67b6dbda 100644
--- a/arch/arm/src/s32k1xx/hardware/s32k146_dmamux.h
+++ b/arch/arm/src/s32k1xx/hardware/s32k11x_dmamux.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/s32k1xx/hardware/s32k146_dmamux.h
+ * arch/arm/src/s32k1xx/hardware/s32k11x_dmamux.h
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -18,8 +18,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K146_DMAMUX_H
-#define __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K146_DMAMUX_H
+#ifndef __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K11X_DMAMUX_H
+#define __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K11X_DMAMUX_H
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -32,8 +32,6 @@
 #define S32K1XX_DMACHAN_LPUART0_TX                 3  /* lpuart0  Transmit DMA 
Request */
 #define S32K1XX_DMACHAN_LPUART1_RX                 4  /* lpuart1  Receive DMA 
Request */
 #define S32K1XX_DMACHAN_LPUART1_TX                 5  /* lpuart1  Transmit DMA 
Request */
-#define S32K1XX_DMACHAN_LPUART2_RX                 6  /* lpuart2  Receive DMA 
Request */
-#define S32K1XX_DMACHAN_LPUART2_TX                 7  /* lpuart2  Transmit DMA 
Request */
 #define S32K1XX_DMACHAN_FLEXIO_SHIFTER0            10 /* flexio FlexIO 
Shifter0 DMA Request */
 #define S32K1XX_DMACHAN_FLEXIO_SHIFTER1            11 /* flexio FlexIO 
Shifter1 DMA Request */
 #define S32K1XX_DMACHAN_FLEXIO_SHIFTER2            12 /* flexio / SAI1  FlexIO 
Shifter2 DMA Request / SAI1 DMA RX Request */
@@ -42,8 +40,6 @@
 #define S32K1XX_DMACHAN_LPSPI0_TX                  15 /* lpspi0 DMA TX Request 
*/
 #define S32K1XX_DMACHAN_LPSPI1_RX                  16 /* lpspi1 DMA RX Request 
*/
 #define S32K1XX_DMACHAN_LPSPI1_TX                  17 /* lpspi1 DMA TX Request 
*/
-#define S32K1XX_DMACHAN_LPSPI2_RX                  18 /* lpspi2 DMA RX Request 
*/
-#define S32K1XX_DMACHAN_LPSPI2_TX                  19 /* lpspi2 DMA TX Request 
*/
 #define S32K1XX_DMACHAN_FTM1_CHANNEL_0             20 /* ftm1 Channel 0 DMA 
transfer request */
 #define S32K1XX_DMACHAN_FTM1_CHANNEL_1             21 /* ftm1 Channel 1 DMA 
transfer request */
 #define S32K1XX_DMACHAN_FTM1_CHANNEL_2             22 /* ftm1 Channel 2 DMA 
transfer request */
@@ -52,24 +48,11 @@
 #define S32K1XX_DMACHAN_FTM1_CHANNEL_5             25 /* ftm1 Channel 5 DMA 
transfer request */
 #define S32K1XX_DMACHAN_FTM1_CHANNEL_6             26 /* ftm1 Channel 6 DMA 
transfer request */
 #define S32K1XX_DMACHAN_FTM1_CHANNEL_7             27 /* ftm1 Channel 7 DMA 
transfer request */
-#define S32K1XX_DMACHAN_FTM2_CHANNEL_0             28 /* ftm2 Channel 0 DMA 
transfer request */
-#define S32K1XX_DMACHAN_FTM2_CHANNEL_1             29 /* ftm2 Channel 1 DMA 
transfer request */
-#define S32K1XX_DMACHAN_FTM2_CHANNEL_2             30 /* ftm2 Channel 2 DMA 
transfer request */
-#define S32K1XX_DMACHAN_FTM2_CHANNEL_3             31 /* ftm2 Channel 3 DMA 
transfer request */
-#define S32K1XX_DMACHAN_FTM2_CHANNEL_4             32 /* ftm2 Channel 4 DMA 
transfer request */
-#define S32K1XX_DMACHAN_FTM2_CHANNEL_5             33 /* ftm2 Channel 5 DMA 
transfer request */
-#define S32K1XX_DMACHAN_FTM2_CHANNEL_6             34 /* ftm2 Channel 6 DMA 
transfer request */
-#define S32K1XX_DMACHAN_FTM2_CHANNEL_7             35 /* ftm2 Channel 7 DMA 
transfer request */
 #define S32K1XX_DMACHAN_FTM0_OR_CH0_CH7            36 /* ftm0 'OR' of FTM0 
channel 0 - 7 */
-#define S32K1XX_DMACHAN_FTM3_OR_CH0_CH7            37 /* ftm3 'OR' of FTM3 
channel 0 - 7 */
-#define S32K1XX_DMACHAN_FTM4_OR_CH0_CH7            38 /* ftm4 'OR' of FTM4 
channel 0 - 7 */
-#define S32K1XX_DMACHAN_FTM5_OR_CH0_CH7            39 /* ftm5 'OR' of FTM5 
channel 0 - 7 */
 #define S32K1XX_DMACHAN_ADC0                       42 /* ftm6 'OR' of FTM6 
channel 0 - 7 */
-#define S32K1XX_DMACHAN_ADC1                       43 /* ftm7 'OR' of FTM7 
channel 0 - 7 */
 #define S32K1XX_DMACHAN_LPI2C0_RX                  44 /* lpi2c0 DMA RX Request 
*/
 #define S32K1XX_DMACHAN_LPI2C0_TX                  45 /* lpi2c0 DMA TX Request 
*/
 #define S32K1XX_DMACHAN_PDB0                       46 /* pdb0 DMA request */
-#define S32K1XX_DMACHAN_PDB1                       47 /* pdb1 DMA request */
 #define S32K1XX_DMACHAN_CMP0                       48 /* cmp0 DMA request */
 #define S32K1XX_DMACHAN_PORTA                      49 /* PORT PORTA DMA 
request */
 #define S32K1XX_DMACHAN_PORTB                      50 /* PORT PORTB DMA 
request */
@@ -77,15 +60,8 @@
 #define S32K1XX_DMACHAN_PORTD                      52 /* PORT PORTD DMA 
request */
 #define S32K1XX_DMACHAN_PORTE                      53 /* PORT PORTE DMA 
request */
 #define S32K1XX_DMACHAN_FLEXCAN0                   54 /* flexcan0 DMA request 
*/
-#define S32K1XX_DMACHAN_FLEXCAN1                   55 /* flexcan1 DMA request 
*/
-#define S32K1XX_DMACHAN_FLEXCAN2                   56 /* flexcan2 DMA request 
*/
 #define S32K1XX_DMACHAN_LPTMR0                     59 /* lptmr0 LPTIMER DMA 
request */
 #define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED0     62 /* Always On DMA request 
*/
 #define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
 
-#endif /* __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K146_DMAMUX_H */
+#endif /* __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K11X_DMAMUX_H */
diff --git a/arch/arm/src/s32k1xx/hardware/s32k146_dmamux.h 
b/arch/arm/src/s32k1xx/hardware/s32k14x_dmamux.h
similarity index 90%
rename from arch/arm/src/s32k1xx/hardware/s32k146_dmamux.h
rename to arch/arm/src/s32k1xx/hardware/s32k14x_dmamux.h
index 0c8480fa27..d4dab6eeba 100644
--- a/arch/arm/src/s32k1xx/hardware/s32k146_dmamux.h
+++ b/arch/arm/src/s32k1xx/hardware/s32k14x_dmamux.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/s32k1xx/hardware/s32k146_dmamux.h
+ * arch/arm/src/s32k1xx/hardware/s32k14x_dmamux.h
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -18,8 +18,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K146_DMAMUX_H
-#define __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K146_DMAMUX_H
+#ifndef __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K14X_DMAMUX_H
+#define __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K14X_DMAMUX_H
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -82,10 +82,5 @@
 #define S32K1XX_DMACHAN_LPTMR0                     59 /* lptmr0 LPTIMER DMA 
request */
 #define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED0     62 /* Always On DMA request 
*/
 #define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
-#define S32K1XX_DMACHAN_DMAMUX_ALWAYS_ENABLED1     63 /* Always On DMA request 
*/
 
-#endif /* __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K146_DMAMUX_H */
+#endif /* __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K14X_DMAMUX_H */
diff --git a/arch/arm/src/s32k1xx/hardware/s32k1xx_dmamux.h 
b/arch/arm/src/s32k1xx/hardware/s32k1xx_dmamux.h
index 315e07d88d..3e97643b3e 100644
--- a/arch/arm/src/s32k1xx/hardware/s32k1xx_dmamux.h
+++ b/arch/arm/src/s32k1xx/hardware/s32k1xx_dmamux.h
@@ -29,9 +29,9 @@
 #include <hardware/s32k1xx_memorymap.h>
 
 #if defined(CONFIG_ARCH_CHIP_S32K11X)
-#  error "Sorry no s32k11x_dmamux.h - Please author one"
+#  include <hardware/s32k11x_dmamux.h>
 #elif defined(CONFIG_ARCH_CHIP_S32K14X)
-#  include <hardware/s32k146_dmamux.h>
+#  include <hardware/s32k14x_dmamux.h>
 #endif
 
 /****************************************************************************

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