pkarashchenko commented on code in PR #7865: URL: https://github.com/apache/nuttx/pull/7865#discussion_r1047597863
########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) Review Comment: ```suggestion #define VIDEO_START_DELAY(n) ((n) << 4) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) Review Comment: ```suggestion #define VIDEO_VACT(n) ((n) << 0) #define VIDEO_VT(n) ((n) << 16) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) Review Comment: ```suggestion #define VIDEO_VSA(n) ((n) << 0) #define VIDEO_VBP(n) ((n) << 16) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) Review Comment: ```suggestion #define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + (n) * 0x10) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) Review Comment: ```suggestion #define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + (n) * 0x04) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) +#define DSI_INST_JUMP_CFG 0 + +/* DSI Transfer Start Register (Undocumented) */ + +#define DSI_TRANS_START_REG (A64_DSI_ADDR + 0x60) + +/* DSI Transfer Zero Register (Undocumented) */ + +#define DSI_TRANS_ZERO_REG (A64_DSI_ADDR + 0x78) + +/* DSI Timing Controller DRQ Register (Undocumented) */ + +#define DSI_TCON_DRQ_REG (A64_DSI_ADDR + 0x7c) + +/* DSI Pixel Format Register 0 (A31 Page 847) */ + +#define DSI_PIXEL_CTL0_REG (A64_DSI_ADDR + 0x80) +#define PIXEL_FORMAT(n) (n << 0) +#define PIXEL_ENDIAN (0 << 4) +#define PD_PLUG_DIS (1 << 16) + +/* DSI Pixel Package Register 0 (A31 Page 848) */ + +#define DSI_PIXEL_PH_REG (A64_DSI_ADDR + 0x90) +#define PIXEL_DT(n) (n << 0) +#define PIXEL_VC(n) (n << 6) +#define PIXEL_WC(n) (n << 8) +#define PIXEL_ECC(n) (n << 24) + +/* DSI Pixel Package Register 2 (A31 Page 849) */ + +#define DSI_PIXEL_PF0_REG (A64_DSI_ADDR + 0x98) +#define CRC_FORCE 0xffff + +/* DSI Pixel Package Register 3 (A31 Page 849) */ + +#define DSI_PIXEL_PF1_REG (A64_DSI_ADDR + 0x9c) +#define CRC_INIT_LINE0(n) (n << 0) +#define CRC_INIT_LINEN(n) (n << 16) + +/* DSI Sync Package Register 0 (A31 Page 850) */ + +#define DSI_SYNC_HSS_REG (A64_DSI_ADDR + 0xb0) +#define SYNC_ECC(n) (n << 24) +#define SYNC_D1(n) (n << 16) +#define SYNC_D0(n) (n << 8) +#define SYNC_VC(n) (n << 6) +#define SYNC_DT(n) (n << 0) Review Comment: ```suggestion #define SYNC_ECC(n) ((n) << 24) #define SYNC_D1(n) ((n) << 16) #define SYNC_D0(n) ((n) << 8) #define SYNC_VC(n) ((n) << 6) #define SYNC_DT(n) ((n) << 0) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) +#define DSI_INST_JUMP_CFG 0 + +/* DSI Transfer Start Register (Undocumented) */ + +#define DSI_TRANS_START_REG (A64_DSI_ADDR + 0x60) + +/* DSI Transfer Zero Register (Undocumented) */ + +#define DSI_TRANS_ZERO_REG (A64_DSI_ADDR + 0x78) + +/* DSI Timing Controller DRQ Register (Undocumented) */ + +#define DSI_TCON_DRQ_REG (A64_DSI_ADDR + 0x7c) + +/* DSI Pixel Format Register 0 (A31 Page 847) */ + +#define DSI_PIXEL_CTL0_REG (A64_DSI_ADDR + 0x80) +#define PIXEL_FORMAT(n) (n << 0) +#define PIXEL_ENDIAN (0 << 4) +#define PD_PLUG_DIS (1 << 16) + +/* DSI Pixel Package Register 0 (A31 Page 848) */ + +#define DSI_PIXEL_PH_REG (A64_DSI_ADDR + 0x90) +#define PIXEL_DT(n) (n << 0) +#define PIXEL_VC(n) (n << 6) +#define PIXEL_WC(n) (n << 8) +#define PIXEL_ECC(n) (n << 24) + +/* DSI Pixel Package Register 2 (A31 Page 849) */ + +#define DSI_PIXEL_PF0_REG (A64_DSI_ADDR + 0x98) +#define CRC_FORCE 0xffff + +/* DSI Pixel Package Register 3 (A31 Page 849) */ + +#define DSI_PIXEL_PF1_REG (A64_DSI_ADDR + 0x9c) +#define CRC_INIT_LINE0(n) (n << 0) +#define CRC_INIT_LINEN(n) (n << 16) + +/* DSI Sync Package Register 0 (A31 Page 850) */ + +#define DSI_SYNC_HSS_REG (A64_DSI_ADDR + 0xb0) +#define SYNC_ECC(n) (n << 24) +#define SYNC_D1(n) (n << 16) +#define SYNC_D0(n) (n << 8) +#define SYNC_VC(n) (n << 6) +#define SYNC_DT(n) (n << 0) + +/* DSI Sync Package Register 1 (A31 Page 850) */ + +#define DSI_SYNC_HSE_REG (A64_DSI_ADDR + 0xb4) + +/* DSI Sync Package Register 2 (A31 Page 851) */ + +#define DSI_SYNC_VSS_REG (A64_DSI_ADDR + 0xb8) + +/* DSI Sync Package Register 3 (A31 Page 851) */ + +#define DSI_SYNC_VSE_REG (A64_DSI_ADDR + 0xbc) + +/* DSI Blank Package Register 0 (A31 Page 852) */ + +#define DSI_BLK_HSA0_REG (A64_DSI_ADDR + 0xc0) + +/* DSI Blank Package Register 1 (A31 Page 852) */ + +#define DSI_BLK_HSA1_REG (A64_DSI_ADDR + 0xc4) +#define HSA_PD(n) (n << 0) +#define HSA_PF(n) (n << 16) + +/* DSI Blank Package Register 2 (A31 Page 852) */ + +#define DSI_BLK_HBP0_REG (A64_DSI_ADDR + 0xc8) + +/* DSI Blank Package Register 3 (A31 Page 852) */ + +#define DSI_BLK_HBP1_REG (A64_DSI_ADDR + 0xcc) +#define HBP_PD(n) (n << 0) +#define HBP_PF(n) (n << 16) + +/* DSI Blank Package Register 4 (A31 Page 852) */ + +#define DSI_BLK_HFP0_REG (A64_DSI_ADDR + 0xd0) + +/* DSI Blank Package Register 5 (A31 Page 853) */ + +#define DSI_BLK_HFP1_REG (A64_DSI_ADDR + 0xd4) +#define HFP_PD(n) (n << 0) +#define HFP_PF(n) (n << 16) Review Comment: ```suggestion #define HFP_PD(n) ((n) << 0) #define HFP_PF(n) ((n) << 16) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) +#define DSI_INST_JUMP_CFG 0 + +/* DSI Transfer Start Register (Undocumented) */ + +#define DSI_TRANS_START_REG (A64_DSI_ADDR + 0x60) + +/* DSI Transfer Zero Register (Undocumented) */ + +#define DSI_TRANS_ZERO_REG (A64_DSI_ADDR + 0x78) + +/* DSI Timing Controller DRQ Register (Undocumented) */ + +#define DSI_TCON_DRQ_REG (A64_DSI_ADDR + 0x7c) + +/* DSI Pixel Format Register 0 (A31 Page 847) */ + +#define DSI_PIXEL_CTL0_REG (A64_DSI_ADDR + 0x80) +#define PIXEL_FORMAT(n) (n << 0) +#define PIXEL_ENDIAN (0 << 4) +#define PD_PLUG_DIS (1 << 16) + +/* DSI Pixel Package Register 0 (A31 Page 848) */ + +#define DSI_PIXEL_PH_REG (A64_DSI_ADDR + 0x90) +#define PIXEL_DT(n) (n << 0) +#define PIXEL_VC(n) (n << 6) +#define PIXEL_WC(n) (n << 8) +#define PIXEL_ECC(n) (n << 24) + +/* DSI Pixel Package Register 2 (A31 Page 849) */ + +#define DSI_PIXEL_PF0_REG (A64_DSI_ADDR + 0x98) +#define CRC_FORCE 0xffff + +/* DSI Pixel Package Register 3 (A31 Page 849) */ + +#define DSI_PIXEL_PF1_REG (A64_DSI_ADDR + 0x9c) +#define CRC_INIT_LINE0(n) (n << 0) +#define CRC_INIT_LINEN(n) (n << 16) + +/* DSI Sync Package Register 0 (A31 Page 850) */ + +#define DSI_SYNC_HSS_REG (A64_DSI_ADDR + 0xb0) +#define SYNC_ECC(n) (n << 24) +#define SYNC_D1(n) (n << 16) +#define SYNC_D0(n) (n << 8) +#define SYNC_VC(n) (n << 6) +#define SYNC_DT(n) (n << 0) + +/* DSI Sync Package Register 1 (A31 Page 850) */ + +#define DSI_SYNC_HSE_REG (A64_DSI_ADDR + 0xb4) + +/* DSI Sync Package Register 2 (A31 Page 851) */ + +#define DSI_SYNC_VSS_REG (A64_DSI_ADDR + 0xb8) + +/* DSI Sync Package Register 3 (A31 Page 851) */ + +#define DSI_SYNC_VSE_REG (A64_DSI_ADDR + 0xbc) + +/* DSI Blank Package Register 0 (A31 Page 852) */ + +#define DSI_BLK_HSA0_REG (A64_DSI_ADDR + 0xc0) + +/* DSI Blank Package Register 1 (A31 Page 852) */ + +#define DSI_BLK_HSA1_REG (A64_DSI_ADDR + 0xc4) +#define HSA_PD(n) (n << 0) +#define HSA_PF(n) (n << 16) + +/* DSI Blank Package Register 2 (A31 Page 852) */ + +#define DSI_BLK_HBP0_REG (A64_DSI_ADDR + 0xc8) + +/* DSI Blank Package Register 3 (A31 Page 852) */ + +#define DSI_BLK_HBP1_REG (A64_DSI_ADDR + 0xcc) +#define HBP_PD(n) (n << 0) +#define HBP_PF(n) (n << 16) + +/* DSI Blank Package Register 4 (A31 Page 852) */ + +#define DSI_BLK_HFP0_REG (A64_DSI_ADDR + 0xd0) + +/* DSI Blank Package Register 5 (A31 Page 853) */ + +#define DSI_BLK_HFP1_REG (A64_DSI_ADDR + 0xd4) +#define HFP_PD(n) (n << 0) +#define HFP_PF(n) (n << 16) + +/* DSI Blank Package Register 6 (A31 Page 853) */ + +#define DSI_BLK_HBLK0_REG (A64_DSI_ADDR + 0xe0) + +/* DSI Blank Package Register 7 (A31 Page 853) */ + +#define DSI_BLK_HBLK1_REG (A64_DSI_ADDR + 0xe4) +#define HBLK_PD(n) (n << 0) +#define HBLK_PF(n) (n << 16) Review Comment: ```suggestion #define HBLK_PD(n) ((n) << 0) #define HBLK_PF(n) ((n) << 16) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) +#define DSI_INST_JUMP_CFG 0 + +/* DSI Transfer Start Register (Undocumented) */ + +#define DSI_TRANS_START_REG (A64_DSI_ADDR + 0x60) + +/* DSI Transfer Zero Register (Undocumented) */ + +#define DSI_TRANS_ZERO_REG (A64_DSI_ADDR + 0x78) + +/* DSI Timing Controller DRQ Register (Undocumented) */ + +#define DSI_TCON_DRQ_REG (A64_DSI_ADDR + 0x7c) + +/* DSI Pixel Format Register 0 (A31 Page 847) */ + +#define DSI_PIXEL_CTL0_REG (A64_DSI_ADDR + 0x80) +#define PIXEL_FORMAT(n) (n << 0) +#define PIXEL_ENDIAN (0 << 4) +#define PD_PLUG_DIS (1 << 16) + +/* DSI Pixel Package Register 0 (A31 Page 848) */ + +#define DSI_PIXEL_PH_REG (A64_DSI_ADDR + 0x90) +#define PIXEL_DT(n) (n << 0) +#define PIXEL_VC(n) (n << 6) +#define PIXEL_WC(n) (n << 8) +#define PIXEL_ECC(n) (n << 24) + +/* DSI Pixel Package Register 2 (A31 Page 849) */ + +#define DSI_PIXEL_PF0_REG (A64_DSI_ADDR + 0x98) +#define CRC_FORCE 0xffff + +/* DSI Pixel Package Register 3 (A31 Page 849) */ + +#define DSI_PIXEL_PF1_REG (A64_DSI_ADDR + 0x9c) +#define CRC_INIT_LINE0(n) (n << 0) +#define CRC_INIT_LINEN(n) (n << 16) + +/* DSI Sync Package Register 0 (A31 Page 850) */ + +#define DSI_SYNC_HSS_REG (A64_DSI_ADDR + 0xb0) +#define SYNC_ECC(n) (n << 24) +#define SYNC_D1(n) (n << 16) +#define SYNC_D0(n) (n << 8) +#define SYNC_VC(n) (n << 6) +#define SYNC_DT(n) (n << 0) + +/* DSI Sync Package Register 1 (A31 Page 850) */ + +#define DSI_SYNC_HSE_REG (A64_DSI_ADDR + 0xb4) + +/* DSI Sync Package Register 2 (A31 Page 851) */ + +#define DSI_SYNC_VSS_REG (A64_DSI_ADDR + 0xb8) + +/* DSI Sync Package Register 3 (A31 Page 851) */ + +#define DSI_SYNC_VSE_REG (A64_DSI_ADDR + 0xbc) + +/* DSI Blank Package Register 0 (A31 Page 852) */ + +#define DSI_BLK_HSA0_REG (A64_DSI_ADDR + 0xc0) + +/* DSI Blank Package Register 1 (A31 Page 852) */ + +#define DSI_BLK_HSA1_REG (A64_DSI_ADDR + 0xc4) +#define HSA_PD(n) (n << 0) +#define HSA_PF(n) (n << 16) Review Comment: ```suggestion #define HSA_PD(n) ((n) << 0) #define HSA_PF(n) ((n) << 16) ``` ########## arch/arm64/src/a64/mipi_dsi.c: ########## @@ -0,0 +1,387 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/crc16.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> +#include "mipi_dsi.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: compute_crc + * + * Description: + * Compute the MIPI DSI CRC for the data buffer. + * + * Input Parameters: + * data - Data buffer + * len - Length of data buffer + * + * Returned Value: + * MIPI DSI CRC value of the data buffer + * + ****************************************************************************/ + +static uint16_t compute_crc(FAR const uint8_t *data, size_t len) +{ + uint16_t crc; + + /* Compute CRC-16-CCITT (x^16+x^12+x^5+1) */ + + DEBUGASSERT(data != NULL); + crc = crc16ccittpart(data, len, 0xffff); + + return crc; +} + +/**************************************************************************** + * Name: compute_ecc + * + * Description: + * Compute the MIPI DSI Error Correction Code (ECC) for the 3-byte + * Packet Header. The ECC allows single-bit errors to be corrected and + * 2-bit errors to be detected in the MIPI DSI Packet Header. + * + * Input Parameters: + * di_wc - Packet Header (Data Identifier + Word Count) + * len - Length of Packet Header (Should be 3 bytes) + * + * Returned Value: + * MIPI DSI ECC value of the Packet Header + * + ****************************************************************************/ + +static uint8_t compute_ecc(FAR const uint8_t *di_wc, + size_t len) +{ + uint32_t di_wc_word; + bool d[24]; + bool ecc[8]; + int i; + + /* Packet Header should be exactly 3 bytes */ + + DEBUGASSERT(di_wc != NULL); + if (len != 3) + { + DEBUGPANIC(); + return 0; + } + + /* Combine Data Identifier and Word Count into a 24-bit word */ + + di_wc_word = di_wc[0] | (di_wc[1] << 8) | (di_wc[2] << 16); + + /* Extract the 24 bits from the word */ + + memset(d, 0, sizeof(d)); + for (i = 0; i < 24; i++) + { + d[i] = di_wc_word & 1; + di_wc_word >>= 1; + } + + /* Compute the ECC bits */ + + memset(ecc, 0, sizeof(ecc)); + ecc[7] = 0; + ecc[6] = 0; + ecc[5] = d[10] ^ d[11] ^ d[12] ^ d[13] ^ d[14] ^ d[15] ^ d[16] ^ d[17] ^ + d[18] ^ d[19] ^ d[21] ^ d[22] ^ d[23]; + ecc[4] = d[4] ^ d[5] ^ d[6] ^ d[7] ^ d[8] ^ d[9] ^ d[16] ^ d[17] ^ + d[18] ^ d[19] ^ d[20] ^ d[22] ^ d[23]; + ecc[3] = d[1] ^ d[2] ^ d[3] ^ d[7] ^ d[8] ^ d[9] ^ d[13] ^ d[14] ^ + d[15] ^ d[19] ^ d[20] ^ d[21] ^ d[23]; + ecc[2] = d[0] ^ d[2] ^ d[3] ^ d[5] ^ d[6] ^ d[9] ^ d[11] ^ d[12] ^ + d[15] ^ d[18] ^ d[20] ^ d[21] ^ d[22]; + ecc[1] = d[0] ^ d[1] ^ d[3] ^ d[4] ^ d[6] ^ d[8] ^ d[10] ^ d[12] ^ + d[14] ^ d[17] ^ d[20] ^ d[21] ^ d[22] ^ d[23]; + ecc[0] = d[0] ^ d[1] ^ d[2] ^ d[4] ^ d[5] ^ d[7] ^ d[10] ^ d[11] ^ + d[13] ^ d[16] ^ d[20] ^ d[21] ^ d[22] ^ d[23]; + + /* Merge the ECC bits */ + + return ecc[0] | (ecc[1] << 1) | (ecc[2] << 2) | (ecc[3] << 3) | + (ecc[4] << 4) | (ecc[5] << 5) | (ecc[6] << 6) | (ecc[7] << 7); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mipi_dsi_long_packet + * + * Description: + * Compose a MIPI DSI Long Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Word Count (Payload Size), + * Error Correction Code, Payload and Checksum. Packet Length is + * Payload Size + 6 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (Max 65541 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_long_packet(FAR uint8_t *pktbuf, Review Comment: ```suggestion ssize_t mipi_dsi_long_packet(uint8_t *pktbuf, ``` ########## arch/arm64/src/a64/mipi_dsi.h: ########## @@ -0,0 +1,108 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_SRC_A64_MIPI_DSI_H +#define __ARCH_ARM64_SRC_A64_MIPI_DSI_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* MIPI DSI Processor-to-Peripheral Transaction Types */ + +enum mipi_dsi_e +{ + /* DCS Short Write (Without Parameter) */ + + MIPI_DSI_DCS_SHORT_WRITE = 0x05, + + /* DCS Short Write (With Parameter) */ + + MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, + + /* DCS Long Write */ + + MIPI_DSI_DCS_LONG_WRITE = 0x39 +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: mipi_dsi_long_packet + * + * Description: + * Compose a MIPI DSI Long Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Word Count (Payload Size), + * Error Correction Code, Payload and Checksum. Packet Length is + * Payload Size + 6 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (Max 65541 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_long_packet(FAR uint8_t *pktbuf, Review Comment: ```suggestion ssize_t mipi_dsi_long_packet(uint8_t *pktbuf, ``` ########## arch/arm64/src/a64/mipi_dsi.c: ########## @@ -0,0 +1,387 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/crc16.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> +#include "mipi_dsi.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: compute_crc + * + * Description: + * Compute the MIPI DSI CRC for the data buffer. + * + * Input Parameters: + * data - Data buffer + * len - Length of data buffer + * + * Returned Value: + * MIPI DSI CRC value of the data buffer + * + ****************************************************************************/ + +static uint16_t compute_crc(FAR const uint8_t *data, size_t len) +{ + uint16_t crc; + + /* Compute CRC-16-CCITT (x^16+x^12+x^5+1) */ + + DEBUGASSERT(data != NULL); + crc = crc16ccittpart(data, len, 0xffff); + + return crc; +} + +/**************************************************************************** + * Name: compute_ecc + * + * Description: + * Compute the MIPI DSI Error Correction Code (ECC) for the 3-byte + * Packet Header. The ECC allows single-bit errors to be corrected and + * 2-bit errors to be detected in the MIPI DSI Packet Header. + * + * Input Parameters: + * di_wc - Packet Header (Data Identifier + Word Count) + * len - Length of Packet Header (Should be 3 bytes) + * + * Returned Value: + * MIPI DSI ECC value of the Packet Header + * + ****************************************************************************/ + +static uint8_t compute_ecc(FAR const uint8_t *di_wc, + size_t len) +{ + uint32_t di_wc_word; + bool d[24]; + bool ecc[8]; + int i; + + /* Packet Header should be exactly 3 bytes */ + + DEBUGASSERT(di_wc != NULL); + if (len != 3) + { + DEBUGPANIC(); + return 0; + } + + /* Combine Data Identifier and Word Count into a 24-bit word */ + + di_wc_word = di_wc[0] | (di_wc[1] << 8) | (di_wc[2] << 16); + + /* Extract the 24 bits from the word */ + + memset(d, 0, sizeof(d)); + for (i = 0; i < 24; i++) + { + d[i] = di_wc_word & 1; + di_wc_word >>= 1; + } + + /* Compute the ECC bits */ + + memset(ecc, 0, sizeof(ecc)); + ecc[7] = 0; + ecc[6] = 0; + ecc[5] = d[10] ^ d[11] ^ d[12] ^ d[13] ^ d[14] ^ d[15] ^ d[16] ^ d[17] ^ + d[18] ^ d[19] ^ d[21] ^ d[22] ^ d[23]; + ecc[4] = d[4] ^ d[5] ^ d[6] ^ d[7] ^ d[8] ^ d[9] ^ d[16] ^ d[17] ^ + d[18] ^ d[19] ^ d[20] ^ d[22] ^ d[23]; + ecc[3] = d[1] ^ d[2] ^ d[3] ^ d[7] ^ d[8] ^ d[9] ^ d[13] ^ d[14] ^ + d[15] ^ d[19] ^ d[20] ^ d[21] ^ d[23]; + ecc[2] = d[0] ^ d[2] ^ d[3] ^ d[5] ^ d[6] ^ d[9] ^ d[11] ^ d[12] ^ + d[15] ^ d[18] ^ d[20] ^ d[21] ^ d[22]; + ecc[1] = d[0] ^ d[1] ^ d[3] ^ d[4] ^ d[6] ^ d[8] ^ d[10] ^ d[12] ^ + d[14] ^ d[17] ^ d[20] ^ d[21] ^ d[22] ^ d[23]; + ecc[0] = d[0] ^ d[1] ^ d[2] ^ d[4] ^ d[5] ^ d[7] ^ d[10] ^ d[11] ^ + d[13] ^ d[16] ^ d[20] ^ d[21] ^ d[22] ^ d[23]; + + /* Merge the ECC bits */ + + return ecc[0] | (ecc[1] << 1) | (ecc[2] << 2) | (ecc[3] << 3) | + (ecc[4] << 4) | (ecc[5] << 5) | (ecc[6] << 6) | (ecc[7] << 7); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mipi_dsi_long_packet + * + * Description: + * Compose a MIPI DSI Long Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Word Count (Payload Size), + * Error Correction Code, Payload and Checksum. Packet Length is + * Payload Size + 6 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (Max 65541 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_long_packet(FAR uint8_t *pktbuf, + size_t pktlen, + uint8_t channel, + enum mipi_dsi_e cmd, + FAR const uint8_t *txbuf, Review Comment: ```suggestion const uint8_t *txbuf, ``` ########## arch/arm64/src/a64/mipi_dsi.h: ########## @@ -0,0 +1,108 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_SRC_A64_MIPI_DSI_H +#define __ARCH_ARM64_SRC_A64_MIPI_DSI_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* MIPI DSI Processor-to-Peripheral Transaction Types */ + +enum mipi_dsi_e +{ + /* DCS Short Write (Without Parameter) */ + + MIPI_DSI_DCS_SHORT_WRITE = 0x05, + + /* DCS Short Write (With Parameter) */ + + MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, + + /* DCS Long Write */ + + MIPI_DSI_DCS_LONG_WRITE = 0x39 +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: mipi_dsi_long_packet + * + * Description: + * Compose a MIPI DSI Long Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Word Count (Payload Size), + * Error Correction Code, Payload and Checksum. Packet Length is + * Payload Size + 6 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (Max 65541 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_long_packet(FAR uint8_t *pktbuf, + size_t pktlen, + uint8_t channel, + enum mipi_dsi_e cmd, + FAR const uint8_t *txbuf, + size_t txlen); + +/**************************************************************************** + * Name: mipi_dsi_short_packet + * + * Description: + * Compose a MIPI DSI Short Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Data (1 or 2 bytes) and + * Error Correction Code. Packet Length is 4 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (1 or 2 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_short_packet(FAR uint8_t *pktbuf, Review Comment: ```suggestion ssize_t mipi_dsi_short_packet(uint8_t *pktbuf, ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) +#define DSI_INST_JUMP_CFG 0 + +/* DSI Transfer Start Register (Undocumented) */ + +#define DSI_TRANS_START_REG (A64_DSI_ADDR + 0x60) + +/* DSI Transfer Zero Register (Undocumented) */ + +#define DSI_TRANS_ZERO_REG (A64_DSI_ADDR + 0x78) + +/* DSI Timing Controller DRQ Register (Undocumented) */ + +#define DSI_TCON_DRQ_REG (A64_DSI_ADDR + 0x7c) + +/* DSI Pixel Format Register 0 (A31 Page 847) */ + +#define DSI_PIXEL_CTL0_REG (A64_DSI_ADDR + 0x80) +#define PIXEL_FORMAT(n) (n << 0) +#define PIXEL_ENDIAN (0 << 4) +#define PD_PLUG_DIS (1 << 16) + +/* DSI Pixel Package Register 0 (A31 Page 848) */ + +#define DSI_PIXEL_PH_REG (A64_DSI_ADDR + 0x90) +#define PIXEL_DT(n) (n << 0) +#define PIXEL_VC(n) (n << 6) +#define PIXEL_WC(n) (n << 8) +#define PIXEL_ECC(n) (n << 24) + +/* DSI Pixel Package Register 2 (A31 Page 849) */ + +#define DSI_PIXEL_PF0_REG (A64_DSI_ADDR + 0x98) +#define CRC_FORCE 0xffff + +/* DSI Pixel Package Register 3 (A31 Page 849) */ + +#define DSI_PIXEL_PF1_REG (A64_DSI_ADDR + 0x9c) +#define CRC_INIT_LINE0(n) (n << 0) +#define CRC_INIT_LINEN(n) (n << 16) Review Comment: ```suggestion #define CRC_INIT_LINE0(n) ((n) << 0) #define CRC_INIT_LINEN(n) ((n) << 16) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) +#define DSI_INST_JUMP_CFG 0 + +/* DSI Transfer Start Register (Undocumented) */ + +#define DSI_TRANS_START_REG (A64_DSI_ADDR + 0x60) + +/* DSI Transfer Zero Register (Undocumented) */ + +#define DSI_TRANS_ZERO_REG (A64_DSI_ADDR + 0x78) + +/* DSI Timing Controller DRQ Register (Undocumented) */ + +#define DSI_TCON_DRQ_REG (A64_DSI_ADDR + 0x7c) + +/* DSI Pixel Format Register 0 (A31 Page 847) */ + +#define DSI_PIXEL_CTL0_REG (A64_DSI_ADDR + 0x80) +#define PIXEL_FORMAT(n) (n << 0) +#define PIXEL_ENDIAN (0 << 4) +#define PD_PLUG_DIS (1 << 16) + +/* DSI Pixel Package Register 0 (A31 Page 848) */ + +#define DSI_PIXEL_PH_REG (A64_DSI_ADDR + 0x90) +#define PIXEL_DT(n) (n << 0) +#define PIXEL_VC(n) (n << 6) +#define PIXEL_WC(n) (n << 8) +#define PIXEL_ECC(n) (n << 24) Review Comment: ```suggestion #define PIXEL_DT(n) ((n) << 0) #define PIXEL_VC(n) ((n) << 6) #define PIXEL_WC(n) ((n) << 8) #define PIXEL_ECC(n) ((n) << 24) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) Review Comment: ```suggestion #define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + (n) * 0x04) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) +#define DSI_INST_JUMP_CFG 0 + +/* DSI Transfer Start Register (Undocumented) */ + +#define DSI_TRANS_START_REG (A64_DSI_ADDR + 0x60) + +/* DSI Transfer Zero Register (Undocumented) */ + +#define DSI_TRANS_ZERO_REG (A64_DSI_ADDR + 0x78) + +/* DSI Timing Controller DRQ Register (Undocumented) */ + +#define DSI_TCON_DRQ_REG (A64_DSI_ADDR + 0x7c) + +/* DSI Pixel Format Register 0 (A31 Page 847) */ + +#define DSI_PIXEL_CTL0_REG (A64_DSI_ADDR + 0x80) +#define PIXEL_FORMAT(n) (n << 0) Review Comment: ```suggestion #define PIXEL_FORMAT(n) ((n) << 0) ``` ########## arch/arm64/src/a64/a64_mipi_dphy.c: ########## @@ -0,0 +1,162 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dphy.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "a64_mipi_dphy.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* MIPI_DSI Clock Register */ + +#define MIPI_DSI_CLK_REG (A64_CCU_ADDR + 0x168) +#define DPHY_CLK_DIV_M(n) (n << 0) +#define DSI_DPHY_SRC_SEL(n) (n << 8) Review Comment: ```suggestion #define DPHY_CLK_DIV_M(n) ((n) << 0) #define DSI_DPHY_SRC_SEL(n) ((n) << 8) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) +#define DSI_INST_JUMP_CFG 0 + +/* DSI Transfer Start Register (Undocumented) */ + +#define DSI_TRANS_START_REG (A64_DSI_ADDR + 0x60) + +/* DSI Transfer Zero Register (Undocumented) */ + +#define DSI_TRANS_ZERO_REG (A64_DSI_ADDR + 0x78) + +/* DSI Timing Controller DRQ Register (Undocumented) */ + +#define DSI_TCON_DRQ_REG (A64_DSI_ADDR + 0x7c) + +/* DSI Pixel Format Register 0 (A31 Page 847) */ + +#define DSI_PIXEL_CTL0_REG (A64_DSI_ADDR + 0x80) +#define PIXEL_FORMAT(n) (n << 0) +#define PIXEL_ENDIAN (0 << 4) +#define PD_PLUG_DIS (1 << 16) + +/* DSI Pixel Package Register 0 (A31 Page 848) */ + +#define DSI_PIXEL_PH_REG (A64_DSI_ADDR + 0x90) +#define PIXEL_DT(n) (n << 0) +#define PIXEL_VC(n) (n << 6) +#define PIXEL_WC(n) (n << 8) +#define PIXEL_ECC(n) (n << 24) + +/* DSI Pixel Package Register 2 (A31 Page 849) */ + +#define DSI_PIXEL_PF0_REG (A64_DSI_ADDR + 0x98) +#define CRC_FORCE 0xffff + +/* DSI Pixel Package Register 3 (A31 Page 849) */ + +#define DSI_PIXEL_PF1_REG (A64_DSI_ADDR + 0x9c) +#define CRC_INIT_LINE0(n) (n << 0) +#define CRC_INIT_LINEN(n) (n << 16) + +/* DSI Sync Package Register 0 (A31 Page 850) */ + +#define DSI_SYNC_HSS_REG (A64_DSI_ADDR + 0xb0) +#define SYNC_ECC(n) (n << 24) +#define SYNC_D1(n) (n << 16) +#define SYNC_D0(n) (n << 8) +#define SYNC_VC(n) (n << 6) +#define SYNC_DT(n) (n << 0) + +/* DSI Sync Package Register 1 (A31 Page 850) */ + +#define DSI_SYNC_HSE_REG (A64_DSI_ADDR + 0xb4) + +/* DSI Sync Package Register 2 (A31 Page 851) */ + +#define DSI_SYNC_VSS_REG (A64_DSI_ADDR + 0xb8) + +/* DSI Sync Package Register 3 (A31 Page 851) */ + +#define DSI_SYNC_VSE_REG (A64_DSI_ADDR + 0xbc) + +/* DSI Blank Package Register 0 (A31 Page 852) */ + +#define DSI_BLK_HSA0_REG (A64_DSI_ADDR + 0xc0) + +/* DSI Blank Package Register 1 (A31 Page 852) */ + +#define DSI_BLK_HSA1_REG (A64_DSI_ADDR + 0xc4) +#define HSA_PD(n) (n << 0) +#define HSA_PF(n) (n << 16) + +/* DSI Blank Package Register 2 (A31 Page 852) */ + +#define DSI_BLK_HBP0_REG (A64_DSI_ADDR + 0xc8) + +/* DSI Blank Package Register 3 (A31 Page 852) */ + +#define DSI_BLK_HBP1_REG (A64_DSI_ADDR + 0xcc) +#define HBP_PD(n) (n << 0) +#define HBP_PF(n) (n << 16) Review Comment: ```suggestion #define HBP_PD(n) ((n) << 0) #define HBP_PF(n) ((n) << 16) ``` ########## arch/arm64/src/a64/mipi_dsi.c: ########## @@ -0,0 +1,387 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/crc16.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> +#include "mipi_dsi.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: compute_crc + * + * Description: + * Compute the MIPI DSI CRC for the data buffer. + * + * Input Parameters: + * data - Data buffer + * len - Length of data buffer + * + * Returned Value: + * MIPI DSI CRC value of the data buffer + * + ****************************************************************************/ + +static uint16_t compute_crc(FAR const uint8_t *data, size_t len) Review Comment: ```suggestion static uint16_t compute_crc(const uint8_t *data, size_t len) ``` ########## arch/arm64/src/a64/mipi_dsi.c: ########## @@ -0,0 +1,387 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/crc16.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> +#include "mipi_dsi.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: compute_crc + * + * Description: + * Compute the MIPI DSI CRC for the data buffer. + * + * Input Parameters: + * data - Data buffer + * len - Length of data buffer + * + * Returned Value: + * MIPI DSI CRC value of the data buffer + * + ****************************************************************************/ + +static uint16_t compute_crc(FAR const uint8_t *data, size_t len) +{ + uint16_t crc; + + /* Compute CRC-16-CCITT (x^16+x^12+x^5+1) */ + + DEBUGASSERT(data != NULL); + crc = crc16ccittpart(data, len, 0xffff); + + return crc; +} + +/**************************************************************************** + * Name: compute_ecc + * + * Description: + * Compute the MIPI DSI Error Correction Code (ECC) for the 3-byte + * Packet Header. The ECC allows single-bit errors to be corrected and + * 2-bit errors to be detected in the MIPI DSI Packet Header. + * + * Input Parameters: + * di_wc - Packet Header (Data Identifier + Word Count) + * len - Length of Packet Header (Should be 3 bytes) + * + * Returned Value: + * MIPI DSI ECC value of the Packet Header + * + ****************************************************************************/ + +static uint8_t compute_ecc(FAR const uint8_t *di_wc, + size_t len) Review Comment: ```suggestion static uint8_t compute_ecc(const uint8_t *di_wc, size_t len) ``` ########## arch/arm64/src/a64/a64_mipi_dsi.c: ########## @@ -0,0 +1,993 @@ +/**************************************************************************** + * arch/arm64/src/a64/a64_mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + * + * "A31 Page" refers to Allwinner A31 User Manual + * https://lupyuen.github.io/images/A31_User_Manual_v1.3_20150510.pdf + * + * "A64 Page" refers to Allwinner A64 User Manual + * https://lupyuen.github.io/images/Allwinner_A64_User_Manual_V1.1.pdf + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include "arm64_arch.h" +#include "mipi_dsi.h" +#include "a64_mipi_dsi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Maximum Size of DSI Packets that will be sent */ + +#define DSI_MAX_PACKET_SIZE 128 /* In bytes */ + +/* Timeout for DSI Transmission in milliseconds */ + +#define DSI_TIMEOUT_MS 5 + +/* A64 CCU Registers and Bit Definitions ************************************/ + +/* Bus Clock Gating Register 0 (A64 Page 100) */ + +#define BUS_CLK_GATING_REG0 (A64_CCU_ADDR + 0x60) +#define MIPIDSI_GATING (1 << 1) + +/* Bus Software Reset Register 0 (A64 Page 138) */ + +#define BUS_SOFT_RST_REG0 (A64_CCU_ADDR + 0x2C0) +#define MIPI_DSI_RST (1 << 1) + +/* A64 MIPI DSI Registers and Bit Definitions *******************************/ + +/* DSI Control Register (A31 Page 843) */ + +#define DSI_CTL_REG (A64_DSI_ADDR + 0x0) +#define DSI_EN (1 << 0) + +/* DSI Basic Control Register (Undocumented) */ + +#define DSI_BASIC_CTL_REG (A64_DSI_ADDR + 0x0c) + +/* DSI Configuration Register 0 (A31 Page 845) */ + +#define DSI_BASIC_CTL0_REG (A64_DSI_ADDR + 0x10) +#define INSTRU_EN (1 << 0) +#define ECC_EN (1 << 16) +#define CRC_EN (1 << 17) + +/* DSI Configuration Register 1 (A31 Page 846) */ + +#define DSI_BASIC_CTL1_REG (A64_DSI_ADDR + 0x14) +#define DSI_MODE (1 << 0) +#define VIDEO_FRAME_START (1 << 1) +#define VIDEO_PRECISION_MODE_ALIGN (1 << 2) +#define VIDEO_START_DELAY(n) (n << 4) + +/* DSI Line Number Register 0 (A31 Page 847) */ + +#define DSI_BASIC_SIZE0_REG (A64_DSI_ADDR + 0x18) +#define VIDEO_VSA(n) (n << 0) +#define VIDEO_VBP(n) (n << 16) + +/* DSI Line Number Register 1 (A31 Page 847) */ + +#define DSI_BASIC_SIZE1_REG (A64_DSI_ADDR + 0x1c) +#define VIDEO_VACT(n) (n << 0) +#define VIDEO_VT(n) (n << 16) + +/* DSI Instruction Function Register (Undocumented) */ + +#define DSI_INST_FUNC_REG(n) (A64_DSI_ADDR + 0x020 + n * 0x04) +#define DSI_INST_FUNC_LANE_CEN (1 << 4) + +/* DSI Instruction Loop Select Register (Undocumented) */ + +#define DSI_INST_LOOP_SEL_REG (A64_DSI_ADDR + 0x40) + +/* DSI Instruction Loop Number Register (Undocumented) */ + +#define DSI_INST_LOOP_NUM_REG(n) (A64_DSI_ADDR + 0x44 + n * 0x10) + +/* DSI Instruction Jump Select Register (Undocumented) */ + +#define DSI_INST_JUMP_SEL_REG (A64_DSI_ADDR + 0x48) +#define DSI_INST_ID_LP11 0 +#define DSI_INST_ID_TBA 1 +#define DSI_INST_ID_HSC 2 +#define DSI_INST_ID_HSD 3 +#define DSI_INST_ID_LPDT 4 +#define DSI_INST_ID_HSCEXIT 5 +#define DSI_INST_ID_NOP 6 +#define DSI_INST_ID_DLY 7 +#define DSI_INST_ID_END 15 + +/* DSI Instruction Jump Configuration Register (Undocumented) */ + +#define DSI_INST_JUMP_CFG_REG(n) (A64_DSI_ADDR + 0x4c + n * 0x04) +#define DSI_INST_JUMP_CFG 0 + +/* DSI Transfer Start Register (Undocumented) */ + +#define DSI_TRANS_START_REG (A64_DSI_ADDR + 0x60) + +/* DSI Transfer Zero Register (Undocumented) */ + +#define DSI_TRANS_ZERO_REG (A64_DSI_ADDR + 0x78) + +/* DSI Timing Controller DRQ Register (Undocumented) */ + +#define DSI_TCON_DRQ_REG (A64_DSI_ADDR + 0x7c) + +/* DSI Pixel Format Register 0 (A31 Page 847) */ + +#define DSI_PIXEL_CTL0_REG (A64_DSI_ADDR + 0x80) +#define PIXEL_FORMAT(n) (n << 0) +#define PIXEL_ENDIAN (0 << 4) +#define PD_PLUG_DIS (1 << 16) + +/* DSI Pixel Package Register 0 (A31 Page 848) */ + +#define DSI_PIXEL_PH_REG (A64_DSI_ADDR + 0x90) +#define PIXEL_DT(n) (n << 0) +#define PIXEL_VC(n) (n << 6) +#define PIXEL_WC(n) (n << 8) +#define PIXEL_ECC(n) (n << 24) + +/* DSI Pixel Package Register 2 (A31 Page 849) */ + +#define DSI_PIXEL_PF0_REG (A64_DSI_ADDR + 0x98) +#define CRC_FORCE 0xffff + +/* DSI Pixel Package Register 3 (A31 Page 849) */ + +#define DSI_PIXEL_PF1_REG (A64_DSI_ADDR + 0x9c) +#define CRC_INIT_LINE0(n) (n << 0) +#define CRC_INIT_LINEN(n) (n << 16) + +/* DSI Sync Package Register 0 (A31 Page 850) */ + +#define DSI_SYNC_HSS_REG (A64_DSI_ADDR + 0xb0) +#define SYNC_ECC(n) (n << 24) +#define SYNC_D1(n) (n << 16) +#define SYNC_D0(n) (n << 8) +#define SYNC_VC(n) (n << 6) +#define SYNC_DT(n) (n << 0) + +/* DSI Sync Package Register 1 (A31 Page 850) */ + +#define DSI_SYNC_HSE_REG (A64_DSI_ADDR + 0xb4) + +/* DSI Sync Package Register 2 (A31 Page 851) */ + +#define DSI_SYNC_VSS_REG (A64_DSI_ADDR + 0xb8) + +/* DSI Sync Package Register 3 (A31 Page 851) */ + +#define DSI_SYNC_VSE_REG (A64_DSI_ADDR + 0xbc) + +/* DSI Blank Package Register 0 (A31 Page 852) */ + +#define DSI_BLK_HSA0_REG (A64_DSI_ADDR + 0xc0) + +/* DSI Blank Package Register 1 (A31 Page 852) */ + +#define DSI_BLK_HSA1_REG (A64_DSI_ADDR + 0xc4) +#define HSA_PD(n) (n << 0) +#define HSA_PF(n) (n << 16) + +/* DSI Blank Package Register 2 (A31 Page 852) */ + +#define DSI_BLK_HBP0_REG (A64_DSI_ADDR + 0xc8) + +/* DSI Blank Package Register 3 (A31 Page 852) */ + +#define DSI_BLK_HBP1_REG (A64_DSI_ADDR + 0xcc) +#define HBP_PD(n) (n << 0) +#define HBP_PF(n) (n << 16) + +/* DSI Blank Package Register 4 (A31 Page 852) */ + +#define DSI_BLK_HFP0_REG (A64_DSI_ADDR + 0xd0) + +/* DSI Blank Package Register 5 (A31 Page 853) */ + +#define DSI_BLK_HFP1_REG (A64_DSI_ADDR + 0xd4) +#define HFP_PD(n) (n << 0) +#define HFP_PF(n) (n << 16) + +/* DSI Blank Package Register 6 (A31 Page 853) */ + +#define DSI_BLK_HBLK0_REG (A64_DSI_ADDR + 0xe0) + +/* DSI Blank Package Register 7 (A31 Page 853) */ + +#define DSI_BLK_HBLK1_REG (A64_DSI_ADDR + 0xe4) +#define HBLK_PD(n) (n << 0) +#define HBLK_PF(n) (n << 16) + +/* DSI Blank Package Register 8 (A31 Page 854) */ + +#define DSI_BLK_VBLK0_REG (A64_DSI_ADDR + 0xe8) + +/* DSI Blank Package Register 9 (A31 Page 854) */ + +#define DSI_BLK_VBLK1_REG (A64_DSI_ADDR + 0xec) +#define VBLK_PD(n) (n << 0) +#define VBLK_PF(n) (n << 16) Review Comment: ```suggestion #define VBLK_PD(n) ((n) << 0) #define VBLK_PF(n) ((n) << 16) ``` ########## arch/arm64/src/a64/mipi_dsi.c: ########## @@ -0,0 +1,387 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/crc16.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> +#include "mipi_dsi.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: compute_crc + * + * Description: + * Compute the MIPI DSI CRC for the data buffer. + * + * Input Parameters: + * data - Data buffer + * len - Length of data buffer + * + * Returned Value: + * MIPI DSI CRC value of the data buffer + * + ****************************************************************************/ + +static uint16_t compute_crc(FAR const uint8_t *data, size_t len) +{ + uint16_t crc; + + /* Compute CRC-16-CCITT (x^16+x^12+x^5+1) */ + + DEBUGASSERT(data != NULL); + crc = crc16ccittpart(data, len, 0xffff); + + return crc; +} + +/**************************************************************************** + * Name: compute_ecc + * + * Description: + * Compute the MIPI DSI Error Correction Code (ECC) for the 3-byte + * Packet Header. The ECC allows single-bit errors to be corrected and + * 2-bit errors to be detected in the MIPI DSI Packet Header. + * + * Input Parameters: + * di_wc - Packet Header (Data Identifier + Word Count) + * len - Length of Packet Header (Should be 3 bytes) + * + * Returned Value: + * MIPI DSI ECC value of the Packet Header + * + ****************************************************************************/ + +static uint8_t compute_ecc(FAR const uint8_t *di_wc, + size_t len) +{ + uint32_t di_wc_word; + bool d[24]; + bool ecc[8]; + int i; + + /* Packet Header should be exactly 3 bytes */ + + DEBUGASSERT(di_wc != NULL); + if (len != 3) + { + DEBUGPANIC(); + return 0; + } + + /* Combine Data Identifier and Word Count into a 24-bit word */ + + di_wc_word = di_wc[0] | (di_wc[1] << 8) | (di_wc[2] << 16); + + /* Extract the 24 bits from the word */ + + memset(d, 0, sizeof(d)); + for (i = 0; i < 24; i++) + { + d[i] = di_wc_word & 1; + di_wc_word >>= 1; + } + + /* Compute the ECC bits */ + + memset(ecc, 0, sizeof(ecc)); + ecc[7] = 0; + ecc[6] = 0; + ecc[5] = d[10] ^ d[11] ^ d[12] ^ d[13] ^ d[14] ^ d[15] ^ d[16] ^ d[17] ^ + d[18] ^ d[19] ^ d[21] ^ d[22] ^ d[23]; + ecc[4] = d[4] ^ d[5] ^ d[6] ^ d[7] ^ d[8] ^ d[9] ^ d[16] ^ d[17] ^ + d[18] ^ d[19] ^ d[20] ^ d[22] ^ d[23]; + ecc[3] = d[1] ^ d[2] ^ d[3] ^ d[7] ^ d[8] ^ d[9] ^ d[13] ^ d[14] ^ + d[15] ^ d[19] ^ d[20] ^ d[21] ^ d[23]; + ecc[2] = d[0] ^ d[2] ^ d[3] ^ d[5] ^ d[6] ^ d[9] ^ d[11] ^ d[12] ^ + d[15] ^ d[18] ^ d[20] ^ d[21] ^ d[22]; + ecc[1] = d[0] ^ d[1] ^ d[3] ^ d[4] ^ d[6] ^ d[8] ^ d[10] ^ d[12] ^ + d[14] ^ d[17] ^ d[20] ^ d[21] ^ d[22] ^ d[23]; + ecc[0] = d[0] ^ d[1] ^ d[2] ^ d[4] ^ d[5] ^ d[7] ^ d[10] ^ d[11] ^ + d[13] ^ d[16] ^ d[20] ^ d[21] ^ d[22] ^ d[23]; + + /* Merge the ECC bits */ + + return ecc[0] | (ecc[1] << 1) | (ecc[2] << 2) | (ecc[3] << 3) | + (ecc[4] << 4) | (ecc[5] << 5) | (ecc[6] << 6) | (ecc[7] << 7); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mipi_dsi_long_packet + * + * Description: + * Compose a MIPI DSI Long Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Word Count (Payload Size), + * Error Correction Code, Payload and Checksum. Packet Length is + * Payload Size + 6 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (Max 65541 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_long_packet(FAR uint8_t *pktbuf, + size_t pktlen, + uint8_t channel, + enum mipi_dsi_e cmd, + FAR const uint8_t *txbuf, + size_t txlen) +{ + /* Data Identifier (DI) (1 byte): + * Virtual Channel Identifier (Bits 6 to 7) + * Data Type (Bits 0 to 5) + */ + + const uint8_t vc = channel; + const uint8_t dt = cmd; + const uint8_t di = (vc << 6) | dt; + + /* Word Count (WC) (2 bytes)： + * Number of bytes in the Packet Payload + */ + + const uint16_t wc = txlen; + const uint8_t wcl = wc & 0xff; + const uint8_t wch = wc >> 8; + + /* Data Identifier + Word Count (3 bytes): + * For computing Error Correction Code (ECC) + */ + + const uint8_t di_wc[3] = + { + di, + wcl, + wch + }; + + /* Compute ECC for Data Identifier + Word Count */ + + const uint8_t ecc = compute_ecc(di_wc, sizeof(di_wc)); + + /* Packet Header (4 bytes): + * Data Identifier + Word Count + Error Correction Code + */ + + const uint8_t header[4] = + { + di_wc[0], + di_wc[1], + di_wc[2], + ecc + }; + + /* Checksum (CS) (2 bytes): + * 16-bit Cyclic Redundancy Check (CRC) of the Payload + * (Not the entire packet) + */ + + const uint16_t cs = compute_crc(txbuf, txlen); + const uint8_t csl = cs & 0xff; + const uint8_t csh = cs >> 8; + + /* Packet Footer (2 bytes): + * Checksum (CS) + */ + + const uint8_t footer[2] = + { + csl, + csh + }; + + /* Packet Length: + * Packet Header (4 bytes) + * Payload (txlen bytes) + * Packet Footer (2 bytes) + */ + + const size_t len = sizeof(header) + txlen + sizeof(footer); + + ginfo("channel=%d, cmd=0x%x, txlen=%ld\n", channel, cmd, txlen); + DEBUGASSERT(pktbuf != NULL && txbuf != NULL); + DEBUGASSERT(channel < 4); + DEBUGASSERT(cmd < (1 << 6)); + + if (txlen > 65541) /* Max 65,541 bytes for payload */ + { + DEBUGPANIC(); + return ERROR; + } + + if (len > pktlen) /* Packet Buffer too small */ + { + DEBUGPANIC(); + return ERROR; + } + + /* Copy Packet Header, Payload, Packet Footer to Packet Buffer */ + + memcpy(pktbuf, header, sizeof(header)); + memcpy(pktbuf + sizeof(header), txbuf, txlen); + memcpy(pktbuf + sizeof(header) + txlen, footer, sizeof(footer)); + + /* Return the Packet Length */ + + return len; +} + +/**************************************************************************** + * Name: mipi_dsi_short_packet + * + * Description: + * Compose a MIPI DSI Short Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Data (1 or 2 bytes) and + * Error Correction Code. Packet Length is 4 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (1 or 2 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_short_packet(FAR uint8_t *pktbuf, Review Comment: ```suggestion ssize_t mipi_dsi_short_packet(uint8_t *pktbuf, ``` ########## arch/arm64/src/a64/mipi_dsi.c: ########## @@ -0,0 +1,387 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Reference: + * + * "Understanding PinePhone's Display (MIPI DSI)" + * https://lupyuen.github.io/articles/dsi + * + * "NuttX RTOS for PinePhone: Display Driver in Zig" + * https://lupyuen.github.io/articles/dsi2 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/crc16.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> +#include "mipi_dsi.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: compute_crc + * + * Description: + * Compute the MIPI DSI CRC for the data buffer. + * + * Input Parameters: + * data - Data buffer + * len - Length of data buffer + * + * Returned Value: + * MIPI DSI CRC value of the data buffer + * + ****************************************************************************/ + +static uint16_t compute_crc(FAR const uint8_t *data, size_t len) +{ + uint16_t crc; + + /* Compute CRC-16-CCITT (x^16+x^12+x^5+1) */ + + DEBUGASSERT(data != NULL); + crc = crc16ccittpart(data, len, 0xffff); + + return crc; +} + +/**************************************************************************** + * Name: compute_ecc + * + * Description: + * Compute the MIPI DSI Error Correction Code (ECC) for the 3-byte + * Packet Header. The ECC allows single-bit errors to be corrected and + * 2-bit errors to be detected in the MIPI DSI Packet Header. + * + * Input Parameters: + * di_wc - Packet Header (Data Identifier + Word Count) + * len - Length of Packet Header (Should be 3 bytes) + * + * Returned Value: + * MIPI DSI ECC value of the Packet Header + * + ****************************************************************************/ + +static uint8_t compute_ecc(FAR const uint8_t *di_wc, + size_t len) +{ + uint32_t di_wc_word; + bool d[24]; + bool ecc[8]; + int i; + + /* Packet Header should be exactly 3 bytes */ + + DEBUGASSERT(di_wc != NULL); + if (len != 3) + { + DEBUGPANIC(); + return 0; + } + + /* Combine Data Identifier and Word Count into a 24-bit word */ + + di_wc_word = di_wc[0] | (di_wc[1] << 8) | (di_wc[2] << 16); + + /* Extract the 24 bits from the word */ + + memset(d, 0, sizeof(d)); + for (i = 0; i < 24; i++) + { + d[i] = di_wc_word & 1; + di_wc_word >>= 1; + } + + /* Compute the ECC bits */ + + memset(ecc, 0, sizeof(ecc)); + ecc[7] = 0; + ecc[6] = 0; + ecc[5] = d[10] ^ d[11] ^ d[12] ^ d[13] ^ d[14] ^ d[15] ^ d[16] ^ d[17] ^ + d[18] ^ d[19] ^ d[21] ^ d[22] ^ d[23]; + ecc[4] = d[4] ^ d[5] ^ d[6] ^ d[7] ^ d[8] ^ d[9] ^ d[16] ^ d[17] ^ + d[18] ^ d[19] ^ d[20] ^ d[22] ^ d[23]; + ecc[3] = d[1] ^ d[2] ^ d[3] ^ d[7] ^ d[8] ^ d[9] ^ d[13] ^ d[14] ^ + d[15] ^ d[19] ^ d[20] ^ d[21] ^ d[23]; + ecc[2] = d[0] ^ d[2] ^ d[3] ^ d[5] ^ d[6] ^ d[9] ^ d[11] ^ d[12] ^ + d[15] ^ d[18] ^ d[20] ^ d[21] ^ d[22]; + ecc[1] = d[0] ^ d[1] ^ d[3] ^ d[4] ^ d[6] ^ d[8] ^ d[10] ^ d[12] ^ + d[14] ^ d[17] ^ d[20] ^ d[21] ^ d[22] ^ d[23]; + ecc[0] = d[0] ^ d[1] ^ d[2] ^ d[4] ^ d[5] ^ d[7] ^ d[10] ^ d[11] ^ + d[13] ^ d[16] ^ d[20] ^ d[21] ^ d[22] ^ d[23]; + + /* Merge the ECC bits */ + + return ecc[0] | (ecc[1] << 1) | (ecc[2] << 2) | (ecc[3] << 3) | + (ecc[4] << 4) | (ecc[5] << 5) | (ecc[6] << 6) | (ecc[7] << 7); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mipi_dsi_long_packet + * + * Description: + * Compose a MIPI DSI Long Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Word Count (Payload Size), + * Error Correction Code, Payload and Checksum. Packet Length is + * Payload Size + 6 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (Max 65541 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_long_packet(FAR uint8_t *pktbuf, + size_t pktlen, + uint8_t channel, + enum mipi_dsi_e cmd, + FAR const uint8_t *txbuf, + size_t txlen) +{ + /* Data Identifier (DI) (1 byte): + * Virtual Channel Identifier (Bits 6 to 7) + * Data Type (Bits 0 to 5) + */ + + const uint8_t vc = channel; + const uint8_t dt = cmd; + const uint8_t di = (vc << 6) | dt; + + /* Word Count (WC) (2 bytes)： + * Number of bytes in the Packet Payload + */ + + const uint16_t wc = txlen; + const uint8_t wcl = wc & 0xff; + const uint8_t wch = wc >> 8; + + /* Data Identifier + Word Count (3 bytes): + * For computing Error Correction Code (ECC) + */ + + const uint8_t di_wc[3] = + { + di, + wcl, + wch + }; + + /* Compute ECC for Data Identifier + Word Count */ + + const uint8_t ecc = compute_ecc(di_wc, sizeof(di_wc)); + + /* Packet Header (4 bytes): + * Data Identifier + Word Count + Error Correction Code + */ + + const uint8_t header[4] = + { + di_wc[0], + di_wc[1], + di_wc[2], + ecc + }; + + /* Checksum (CS) (2 bytes): + * 16-bit Cyclic Redundancy Check (CRC) of the Payload + * (Not the entire packet) + */ + + const uint16_t cs = compute_crc(txbuf, txlen); + const uint8_t csl = cs & 0xff; + const uint8_t csh = cs >> 8; + + /* Packet Footer (2 bytes): + * Checksum (CS) + */ + + const uint8_t footer[2] = + { + csl, + csh + }; + + /* Packet Length: + * Packet Header (4 bytes) + * Payload (txlen bytes) + * Packet Footer (2 bytes) + */ + + const size_t len = sizeof(header) + txlen + sizeof(footer); + + ginfo("channel=%d, cmd=0x%x, txlen=%ld\n", channel, cmd, txlen); + DEBUGASSERT(pktbuf != NULL && txbuf != NULL); + DEBUGASSERT(channel < 4); + DEBUGASSERT(cmd < (1 << 6)); + + if (txlen > 65541) /* Max 65,541 bytes for payload */ + { + DEBUGPANIC(); + return ERROR; + } + + if (len > pktlen) /* Packet Buffer too small */ + { + DEBUGPANIC(); + return ERROR; + } + + /* Copy Packet Header, Payload, Packet Footer to Packet Buffer */ + + memcpy(pktbuf, header, sizeof(header)); + memcpy(pktbuf + sizeof(header), txbuf, txlen); + memcpy(pktbuf + sizeof(header) + txlen, footer, sizeof(footer)); + + /* Return the Packet Length */ + + return len; +} + +/**************************************************************************** + * Name: mipi_dsi_short_packet + * + * Description: + * Compose a MIPI DSI Short Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Data (1 or 2 bytes) and + * Error Correction Code. Packet Length is 4 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (1 or 2 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_short_packet(FAR uint8_t *pktbuf, + size_t pktlen, + uint8_t channel, + enum mipi_dsi_e cmd, + FAR const uint8_t *txbuf, Review Comment: ```suggestion const uint8_t *txbuf, ``` ########## arch/arm64/src/a64/mipi_dsi.h: ########## @@ -0,0 +1,108 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_SRC_A64_MIPI_DSI_H +#define __ARCH_ARM64_SRC_A64_MIPI_DSI_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* MIPI DSI Processor-to-Peripheral Transaction Types */ + +enum mipi_dsi_e +{ + /* DCS Short Write (Without Parameter) */ + + MIPI_DSI_DCS_SHORT_WRITE = 0x05, + + /* DCS Short Write (With Parameter) */ + + MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, + + /* DCS Long Write */ + + MIPI_DSI_DCS_LONG_WRITE = 0x39 +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: mipi_dsi_long_packet + * + * Description: + * Compose a MIPI DSI Long Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Word Count (Payload Size), + * Error Correction Code, Payload and Checksum. Packet Length is + * Payload Size + 6 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (Max 65541 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_long_packet(FAR uint8_t *pktbuf, + size_t pktlen, + uint8_t channel, + enum mipi_dsi_e cmd, + FAR const uint8_t *txbuf, + size_t txlen); + +/**************************************************************************** + * Name: mipi_dsi_short_packet + * + * Description: + * Compose a MIPI DSI Short Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Data (1 or 2 bytes) and + * Error Correction Code. Packet Length is 4 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (1 or 2 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_short_packet(FAR uint8_t *pktbuf, + size_t pktlen, + uint8_t channel, + enum mipi_dsi_e cmd, + FAR const uint8_t *txbuf, Review Comment: ```suggestion const uint8_t *txbuf, ``` ########## arch/arm64/src/a64/mipi_dsi.h: ########## @@ -0,0 +1,108 @@ +/**************************************************************************** + * arch/arm64/src/a64/mipi_dsi.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_SRC_A64_MIPI_DSI_H +#define __ARCH_ARM64_SRC_A64_MIPI_DSI_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* MIPI DSI Processor-to-Peripheral Transaction Types */ + +enum mipi_dsi_e +{ + /* DCS Short Write (Without Parameter) */ + + MIPI_DSI_DCS_SHORT_WRITE = 0x05, + + /* DCS Short Write (With Parameter) */ + + MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, + + /* DCS Long Write */ + + MIPI_DSI_DCS_LONG_WRITE = 0x39 +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: mipi_dsi_long_packet + * + * Description: + * Compose a MIPI DSI Long Packet. A Short Packet consists of Data + * Identifier (Virtual Channel + Data Type), Word Count (Payload Size), + * Error Correction Code, Payload and Checksum. Packet Length is + * Payload Size + 6 bytes. + * + * Input Parameters: + * pktbuf - Buffer for the returned packet + * pktlen - Size of the packet buffer + * channel - Virtual Channel + * cmd - DCS Command (Data Type) + * txbuf - Payload data for the packet + * txlen - Length of payload data (Max 65541 bytes) + * + * Returned Value: + * Number of bytes in the returned packet; ERROR (-1) if packet buffer is + * too small for the packet + * + ****************************************************************************/ + +ssize_t mipi_dsi_long_packet(FAR uint8_t *pktbuf, + size_t pktlen, + uint8_t channel, + enum mipi_dsi_e cmd, + FAR const uint8_t *txbuf, Review Comment: ```suggestion const uint8_t *txbuf, ``` -- This is an automated message from the Apache Git Service. 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