pkarashchenko commented on code in PR #7021:
URL: https://github.com/apache/incubator-nuttx/pull/7021#discussion_r965194426
##########
arch/arm/src/rp2040/rp2040_cyw43439.c:
##########
@@ -606,30 +632,35 @@ static int my_read(FAR struct gspi_dev_s *gspi,
rp_io->pio_sm,
pio_encode_jmp(rp_io->pio_location));
- /* Set the PIO X (tx bit len) and Y (rx bit len) registers.
+ /* Set the PIO X and Y registers.
+ *
+ * We load X (the TX bit length) with one less than the number of
+ * bits to transmit to the chip. Since we only send the 32-bit command
+ * word we set X to 31.
+ *
+ * We load Y with the number of bits to read. This is based on the
+ * byte count in "length" which we round up to a 32-bit boundry so the
+ * pio program will be sure to autopush the final data to the output fifo.
+ *
* This is slightly magical. The way we load the X is to first
* push the the number of bits to transmit onto the transmit fifo.
* Then we force the PIO state machine to execute the instruction
* "out x, 32" which transfers the word from the output shift
* register (OSR) to the X register. When this instruction executes
- * the PIO will notice the the OSR is empty, so will automatically
+ * the PIO will notice that the OSR is empty, so will automatically
* pull a value (the one we just added) from the input fifo.
*
- * Loading the Y works the same way, except we round the number of
- * bits up to a multiple of 32, so the pio program will be sure to
- * autopush the final data to the output fifo.
+ * Loading the Y works the same way.
*/
rp2040_pio_sm_put(rp_io->pio, rp_io->pio_sm, 31);
rp2040_pio_sm_exec(rp_io->pio, rp_io->pio_sm, pio_encode_out(pio_x, 32));
- /* RX bit length is 32 bits for each 4 bytes requested
- * plus 32 bits for status
- */
+ /* RX bit length is 32 bits for each 4 bytes requested. */
bit_length = 32 * ((length + 3) / 4);
- /* For F1 reads and 32 bits for delay */
+ /* For F1 reads add 32 bits for delay */
if (function == gspi_f1_backplane) bit_length += 32;
Review Comment:
Thank you
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