onegray commented on code in PR #6715:
URL: https://github.com/apache/incubator-nuttx/pull/6715#discussion_r930865394
##########
arch/arm/src/stm32wb/stm32wb_ipcc.h:
##########
@@ -71,6 +72,109 @@ void stm32wb_ipccreset(void);
void stm32wb_ipccenable(void);
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32wb_ipcc_rxactive
+ *
+ * Description:
+ * Check channel receive active flag.
+ *
+ ****************************************************************************/
+
+static inline bool stm32wb_ipcc_rxactive(uint8_t chan)
+{
+ return (getreg32(STM32WB_IPCC_C2TOC1SR) & IPCC_C2TOC1SR_BIT(chan)) != 0;
+}
+
+/****************************************************************************
+ * Name: stm32wb_ipcc_txactive
+ *
+ * Description:
+ * Check channel transmit active flag.
+ *
+ ****************************************************************************/
+
+static inline bool stm32wb_ipcc_txactive(uint8_t chan)
+{
+ return (getreg32(STM32WB_IPCC_C1TOC2SR) & IPCC_C1TOC2SR_BIT(chan)) != 0;
+}
+
+/****************************************************************************
+ * Name: stm32wb_ipcc_settxactive
+ *
+ * Description:
+ * Set channel transmit active flag.
+ *
+ ****************************************************************************/
+
+static inline void stm32wb_ipcc_settxactive(uint8_t chan)
+{
+ putreg32(IPCC_C1SCR_SET_BIT(chan), STM32WB_IPCC_C1SCR);
+}
+
+/****************************************************************************
+ * Name: stm32wb_ipcc_masktxf
+ *
+ * Description:
+ * Mask channel transmit free interrupt.
+ *
+ ****************************************************************************/
+
+static inline void stm32wb_ipcc_masktxf(uint8_t chan)
+{
+ uint32_t regval = getreg32(STM32WB_IPCC_C1MR);
+ regval |= IPCC_C1MR_FM_BIT(chan);
+ putreg32(regval, STM32WB_IPCC_C1MR);
+}
+
+/****************************************************************************
+ * Name: stm32wb_ipcc_unmasktxf
+ *
+ * Description:
+ * Unmask channel transmit free interrupt.
+ *
+ ****************************************************************************/
+
+static inline void stm32wb_ipcc_unmasktxf(uint8_t chan)
+{
+ uint32_t regval = getreg32(STM32WB_IPCC_C1MR);
+ regval &= ~IPCC_C1MR_FM_BIT(chan);
+ putreg32(regval, STM32WB_IPCC_C1MR);
+}
+
+/****************************************************************************
+ * Name: stm32wb_ipcc_maskrxo
+ *
+ * Description:
+ * Mask channel receive occupied interrupt.
+ *
+ ****************************************************************************/
+
+static inline void stm32wb_ipcc_maskrxo(uint8_t chan)
+{
+ uint32_t regval = getreg32(STM32WB_IPCC_C1MR);
+ regval |= IPCC_C1MR_OM_BIT(chan);
+ putreg32(regval, STM32WB_IPCC_C1MR);
+}
+
+/****************************************************************************
+ * Name: stm32wb_ipcc_maskrxo
+ *
+ * Description:
+ * Unmask channel receive occupied interrupt.
+ *
+ ****************************************************************************/
+
+static inline void stm32wb_ipcc_unmaskrxo(uint8_t chan)
+{
+ uint32_t regval = getreg32(STM32WB_IPCC_C1MR);
+ regval &= ~IPCC_C1MR_OM_BIT(chan);
+ putreg32(regval, STM32WB_IPCC_C1MR);
Review Comment:
Yeah, I see.
```
modreg32(0, IPCC_C1MR_OM_BIT(chan), STM32WB_IPCC_C1MR);
```
But doesn't it look a bit less expressively?
This file is small enough, so I would leave it as is (if you don't mind).
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