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gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit c7e6366e915cb891f1da4d21a54df92e62b80af0
Author: raiden00pl <raide...@railab.me>
AuthorDate: Fri Jul 15 11:51:02 2022 +0200
stm32f0l0g0/SPI: enable SPI for STM32G0
---
arch/arm/src/stm32f0l0g0/hardware/stm32_dma_v1.h | 3 +++
arch/arm/src/stm32f0l0g0/hardware/stm32_spi.h | 2 +-
arch/arm/src/stm32f0l0g0/stm32_spi.c | 16 ++++++++++++++--
3 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/arm/src/stm32f0l0g0/hardware/stm32_dma_v1.h
b/arch/arm/src/stm32f0l0g0/hardware/stm32_dma_v1.h
index 412695495f..97fc968f33 100644
--- a/arch/arm/src/stm32f0l0g0/hardware/stm32_dma_v1.h
+++ b/arch/arm/src/stm32f0l0g0/hardware/stm32_dma_v1.h
@@ -536,6 +536,9 @@
# define DMACHAN_USART5_TX_1 DMACHAN_SETTING(STM32_DMA1_CHAN7, 13)
# define DMACHAN_USART5_TX_2 DMACHAN_SETTING(STM32_DMA1_CHAN3, 13)
+#elif defined(CONFIG_ARCH_CHIP_STM32G0)
+/* This family uses a DMAMUX */
+
#else
# error "Unknown DMA channel assignments"
#endif
diff --git a/arch/arm/src/stm32f0l0g0/hardware/stm32_spi.h
b/arch/arm/src/stm32f0l0g0/hardware/stm32_spi.h
index 4eb3c65e4a..96e4d2d4c9 100644
--- a/arch/arm/src/stm32f0l0g0/hardware/stm32_spi.h
+++ b/arch/arm/src/stm32f0l0g0/hardware/stm32_spi.h
@@ -30,7 +30,7 @@
/* Select STM32 SPI IP core */
-#if defined(CONFIG_STM32F0L0G0_STM32F0)
+#if defined(CONFIG_STM32F0L0G0_STM32F0) || defined(CONFIG_STM32F0L0G0_STM32G0)
# define HAVE_IP_SPI_V2
#elif defined(CONFIG_STM32F0L0G0_STM32L0)
# define HAVE_IP_SPI_V1
diff --git a/arch/arm/src/stm32f0l0g0/stm32_spi.c
b/arch/arm/src/stm32f0l0g0/stm32_spi.c
index a8a7542e37..510792ab3a 100644
--- a/arch/arm/src/stm32f0l0g0/stm32_spi.c
+++ b/arch/arm/src/stm32f0l0g0/stm32_spi.c
@@ -126,6 +126,18 @@
#define SPI_TXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS
|DMA_CCR_PSIZE_16BITS |DMA_CCR_DIR)
#define SPI_TXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS
|DMA_CCR_PSIZE_8BITS |DMA_CCR_DIR)
+/* SPI clocks */
+
+#if defined(CONFIG_STM32F0L0G0_STM32F0) || defined(CONFIG_STM32F0L0G0_STM32L0)
+# define SPI1_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY
+# define SPI2_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32F0L0G0_STM32G0)
+# define SPI1_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+# define SPI2_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#else
+# error Unsupported family
+#endif
+
/****************************************************************************
* Private Types
****************************************************************************/
@@ -281,7 +293,7 @@ static struct stm32_spidev_s g_spi1dev =
&g_spi1ops
},
.spibase = STM32_SPI1_BASE,
- .spiclock = STM32_PCLK2_FREQUENCY,
+ .spiclock = SPI1_PCLK_FREQUENCY,
#ifdef CONFIG_STM32F0L0G0_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI1,
#endif
@@ -336,7 +348,7 @@ static struct stm32_spidev_s g_spi2dev =
&g_spi2ops
},
.spibase = STM32_SPI2_BASE,
- .spiclock = STM32_PCLK1_FREQUENCY,
+ .spiclock = SPI1_PCLK_FREQUENCY,
#ifdef CONFIG_STM32F0L0G0_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI2,
#endif
