gustavonihei commented on code in PR #6604: URL: https://github.com/apache/incubator-nuttx/pull/6604#discussion_r920067513
########## arch/xtensa/src/esp32s3/esp32s3_dma.c: ########## @@ -0,0 +1,380 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s3/esp32s3_dma.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <sys/types.h> +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/arch.h> +#include <nuttx/irq.h> +#include <nuttx/kmalloc.h> +#include <arch/irq.h> + +#include "xtensa.h" +#include "esp32s3_dma.h" + +#include "hardware/esp32s3_dma.h" +#include "hardware/esp32s3_soc.h" +#include "hardware/esp32s3_system.h" + +/**************************************************************************** + * Pre-processor Macros + ****************************************************************************/ + +#define REG_OFF (DMA_OUT_CONF0_CH1_REG - DMA_OUT_CONF0_CH0_REG) + +#define SET_REG(_r, _ch, _v) putreg32((_v), (_r) + (_ch) * REG_OFF) +#define GET_REG(_r, _ch) getreg32((_r) + (_ch) * REG_OFF) + +#define SET_BITS(_r, _ch, _b) modifyreg32((_r) + (_ch) * REG_OFF, 0, (_b)) +#define CLR_BITS(_r, _ch, _b) modifyreg32((_r) + (_ch) * REG_OFF, (_b), 0) + +#ifndef MIN +# define MIN(a, b) (((a) < (b)) ? (a) : (b)) +#endif + +#ifndef ALIGN_UP +# define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1)) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static bool g_dma_chan_used[ESP32S3_DMA_CHAN_MAX]; +static sem_t g_dma_exc_sem = SEM_INITIALIZER(1); + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s3_dma_request + * + * Description: + * Request DMA channel and config it with given parameters. + * + * Input Parameters: + * periph - Peripheral for which the DMA channel request was made + * tx_prio - Interrupt priority + * rx_prio - Interrupt flags + * burst_en - Enable burst transmission + * + * Returned Value: + * DMA channel number (>=0) if success or -1 if fail. + * + ****************************************************************************/ + +int32_t esp32s3_dma_request(enum esp32s3_dma_periph_e periph, + uint32_t tx_prio, + uint32_t rx_prio, + bool burst_en) +{ + int chan; + + DEBUGASSERT(periph < ESP32S3_DMA_PERIPH_NUM); + + DEBUGASSERT(tx_prio <= ESP32S3_DMA_TX_PRIO_MAX); + DEBUGASSERT(rx_prio <= ESP32S3_DMA_RX_PRIO_MAX); + + dmainfo("periph=%" PRIu32 " tx_prio=%" PRIu32 " rx_prio=%" PRIu32 "\n", + (uint32_t)periph, tx_prio, rx_prio); + + nxsem_wait_uninterruptible(&g_dma_exc_sem); + + for (chan = 0; chan < ESP32S3_DMA_CHAN_MAX; chan++) + { + if (!g_dma_chan_used[chan]) + { + g_dma_chan_used[chan] = true; + break; + } + } + + if (chan == ESP32S3_DMA_CHAN_MAX) + { + dmaerr("No available GDMA channel for allocation\n"); + + nxsem_post(&g_dma_exc_sem); + + return ERROR; + } + + dmainfo("Allocated channel=%d\n", chan); + + if (periph == ESP32S3_DMA_PERIPH_MEM) + { + /* Enable DMA channel M2M mode */ + + SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_MEM_TRANS_EN_CH0_M); + + /* Just setting a valid value to the register */ + + SET_REG(DMA_OUT_PERI_SEL_CH0_REG, chan, 0); + SET_REG(DMA_IN_PERI_SEL_CH0_REG, chan, 0); + } + else + { + /* Disable DMA channel M2M mode */ + + CLR_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_MEM_TRANS_EN_CH0_M); + + /* Connect DMA TX/RX channels to a given peripheral */ + + SET_REG(DMA_OUT_PERI_SEL_CH0_REG, chan, periph); + SET_REG(DMA_IN_PERI_SEL_CH0_REG, chan, periph); + } + + if (burst_en) + { + /* Enable DMA TX/RX channels burst sending data */ + + SET_BITS(DMA_OUT_CONF0_CH0_REG, chan, DMA_OUT_DATA_BURST_EN_CH0_M); + SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_IN_DATA_BURST_EN_CH0_M); + + /* Enable DMA TX/RX channels burst reading descriptor link */ + + SET_BITS(DMA_OUT_CONF0_CH0_REG, chan, DMA_OUTDSCR_BURST_EN_CH0_M); + SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_INDSCR_BURST_EN_CH0_M); Review Comment: These registers names and their fields are auto-generated and they are also referenced by the Technical Reference Manual (TRM). So I'd recommend against this change, it will increase maintenance complexity and will make cross-reference harder with the TRM. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
