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new e87a20e648 Add documentation to ESP32-S3 boards
e87a20e648 is described below
commit e87a20e648843ce53237fdb398417868685af2a1
Author: Alan Carvalho de Assis <acas...@gmail.com>
AuthorDate: Wed Jun 15 20:00:05 2022 -0300
Add documentation to ESP32-S3 boards
---
.../boards/esp32s3-devkit/esp32-s3-devkitc-1.png | Bin 0 -> 479204 bytes
.../xtensa/esp32s3/boards/esp32s3-devkit/index.rst | 57 +++++++
.../esp32s3/boards/esp32s3-eye/esp32s3_eye.png | Bin 0 -> 196123 bytes
.../xtensa/esp32s3/boards/esp32s3-eye/index.rst | 93 +++++++++++
Documentation/platforms/xtensa/esp32s3/index.rst | 184 +++++++++++++++++++++
5 files changed, 334 insertions(+)
diff --git
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diff --git
a/Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst
b/Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst
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+==============
+ESP32S3-DevKit
+==============
+
+The `ESP32S3 DevKit
<https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitc-1.html>`_
is a development board for the ESP32-S3 SoC from Espressif, based on a
ESP32-S3-WROOM-1 module.
+
+.. list-table::
+ :align: center
+
+ * - .. figure:: esp32-s3-devkitc-1.png
+ :align: center
+
+Features
+========
+
+ - ESP32-S3-WROOM-1 Module
+ - USB-to-UART bridge via micro USB port
+ - Power LED
+ - EN and BOOT buttons (BOOT accessible to user)
+ - SPI FLASH (size varies according to model
+
+Serial Console
+==============
+
+UART0 is, by default, the serial console. It connects to the on-board
+CP2102 converter and is available on the USB connector USB CON8 (J1).
+
+It will show up as /dev/ttyUSB[n] where [n] will probably be 0.
+
+Buttons and LEDs
+================
+
+Buttons
+-------
+
+There are two buttons labeled Boot and EN. The EN button is not available
+to software. It pulls the chip enable line that doubles as a reset line.
+
+The BOOT button is connected to IO0. On reset it is used as a strapping
+pin to determine whether the chip boots normally or into the serial
+bootloader. After reset, however, the BOOT button can be used for software
+input.
+
+LEDs
+----
+
+There are several on-board LEDs for that indicate the presence of power
+and USB activity. None of these are available for use by software.
+
+Configurations
+==============
+
+nsh
+---
+
+Basic NuttShell configuration (console enabled in UART0, exposed via
+USB connection by means of CP2102 converter, at 115200 bps).
diff --git
a/Documentation/platforms/xtensa/esp32s3/boards/esp32s3-eye/esp32s3_eye.png
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diff --git
a/Documentation/platforms/xtensa/esp32s3/boards/esp32s3-eye/index.rst
b/Documentation/platforms/xtensa/esp32s3/boards/esp32s3-eye/index.rst
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@@ -0,0 +1,93 @@
+=============
+ESP32-S3-EYE
+=============
+
+The `ESP32-S3-EYE
<https://github.com/espressif/esp-who/blob/master/docs/en/get-started/ESP32-S3-EYE_Getting_Started_Guide.md>`_
is a small-sized AI development board from Espressif featuring the ESP32-S3
CPU with a 2-Megapixel camera, an LCD display, a microphone, an 8 MB Octal
PSRAM and an 8 MB flash.
+
+.. list-table::
+ :align: center
+
+ * - .. figure:: esp32s3_eye.png
+ :align: center
+
+Features
+========
+
+ - ESP32-S3 WROOM-1 Module
+ - USB micro USB port (it uses internal USB JTAG SERIAL device for flashing)
+ - Power LED
+ - LCD Display
+ - 2-MP Camera
+ - MEMS Microphone
+ - 8MB Octal PSRAM
+ - 8MB SPI Flash
+ - RST and BOOT buttons (BOOT accessible to user)
+
+Configurations
+==============
+
+nsh
+---
+
+Basic NuttShell configuration (console enabled in USB JTAG SERIAL Device,
exposed via
+USB connection at 9600 bps).
+
+You can configure this board profile this way:
+
+ $ cd nuttxspace/nuttx
+ $ ./tools/configure.sh esp32s3-eye:nsh
+
+Flashing
+========
+
+Because ESP32-S3 doesn't use an external USB/Serial chip like others ESP32
+boards you should put it in programming mode this way:
+
+ 1) Press and hold BOOT and RESET (RST) buttons at same time;
+ 2) Release the RESET button and keep BOOT button pressed;
+ 3) After one or more seconds release the BOOT button;
+ 4) Run the flashing command: make flash ESPTOOL_PORT=/dev/ttyACM0
+
+Serial Console
+==============
+
+The internal USB JTAG SERIAL Device, by default, is used as serial console.
+It is normally detected by Linux host as a USB CDC/ACM serial device.
+
+It will show up as /dev/ttyACM[n] where [n] will probably be 0.
+
+You can use minicom with /dev/ttyACM0 port at 9600 8n1 or picocom this way:
+
+ $ picocom -b9600 /dev/ttyACM0
+
+Buttons and LEDs
+================
+
+Buttons
+-------
+
+There are two buttons labeled BOOT and RST. The RST button is not available
+to software. It pulls the chip enable line that doubles as a reset line.
+
+The BOOT button is connected to IO0. On reset it is used as a strapping
+pin to determine whether the chip boots normally or into the serial
+bootloader. After reset, however, the BOOT button can be used for software
+input.
+
+LEDs
+----
+
+There are several on-board LEDs for that indicate the presence of power
+and USB activity. None of these are available for use by software.
+
+Pin Mapping
+===========
+
+.. todo:: To be updated
+
+===== ========== ==========
+Pin Signal Notes
+===== ========== ==========
+? ? ?
+===== ========== ==========
+
diff --git a/Documentation/platforms/xtensa/esp32s3/index.rst
b/Documentation/platforms/xtensa/esp32s3/index.rst
new file mode 100644
index 0000000000..0b511e7d72
--- /dev/null
+++ b/Documentation/platforms/xtensa/esp32s3/index.rst
@@ -0,0 +1,184 @@
+==================
+Espressif ESP32-S3
+==================
+
+The ESP32-S3 is a series of single and dual-core SoCs from Espressif
+based on Harvard architecture Xtensa LX7 CPUs and with on-chip support
+for Bluetooth and Wi-Fi.
+
+All embedded memory, external memory and peripherals are located on the
+data bus and/or the instruction bus of these CPUs. With some minor
+exceptions, the address mapping of two CPUs is symmetric, meaning they
+use the same addresses to access the same memory. Multiple peripherals in
+the system can access embedded memory via DMA.
+
+On dual-core SoCs, the two CPUs are typically named "PRO_CPU" and "APP_CPU"
+(for "protocol" and "application"), however for most purposes the
+two CPUs are interchangeable.
+
+Toolchain
+=========
+
+You can use the prebuilt `toolchain
<https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/tools/idf-tools.html#xtensa-esp32s3-elf>`__
+for Xtensa architecture and `OpenOCD
<https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/tools/idf-tools.html#openocd-esp32>`__
+for ESP32-S3 by Espressif.
+
+For flashing firmware, you will need to install ``esptool.py`` by running::
+
+ $ pip install esptool
+
+Building from source
+--------------------
+
+You can also build the toolchain yourself. The steps to
+build the toolchain with crosstool-NG on Linux are as follows
+
+.. code-block:: console
+
+ $ git clone https://github.com/espressif/crosstool-NG.git
+ $ cd crosstool-NG
+ $ git submodule update --init
+
+ $ ./bootstrap && ./configure --enable-local && make
+
+ $ ./ct-ng xtensa-esp32s3-elf
+ $ ./ct-ng build
+
+ $ chmod -R u+w builds/xtensa-esp32s3-elf
+
+ $ export PATH="crosstool-NG/builds/xtensa-esp32-elf/bin:$PATH"
+
+These steps are given in the setup guide in
+`ESP-IDF documentation
<https://docs.espressif.com/projects/esp-idf/en/latest/get-started/linux-setup-scratch.html>`_.
+
+Flashing
+========
+
+Firmware for ESP32-S3 is flashed via the USB/UART or internal USB DEVICE JTAG
interface using the
+``esptool.py`` tool.
+It's a two step process where the first converts the ELF file into a ESP32-S3
compatible binary
+and the second flashes it to the board. These steps are included into the
build system and you can
+flash your NuttX firmware simply by running::
+
+ $ make flash ESPTOOL_PORT=<port>
+
+where ``<port>`` is typically ``/dev/ttyUSB0`` or similar. You can change the
baudrate by passing ``ESPTOOL_BAUD``.
+
+Bootloader and partitions
+-------------------------
+
+ESP32-S3 requires a bootloader to be flashed as well as a set of FLASH
partitions. This is only needed the first time
+(or any time you which to modify either of these). An easy way is to use
prebuilt binaries for NuttX `from here
<https://github.com/espressif/esp-nuttx-bootloader>`_. In there you will find
instructions to rebuild these if necessary.
+Once you downloaded both binaries, you can flash them by adding an
``ESPTOOL_BINDIR`` parameter, pointing to the directory where these binaries
were downloaded:
+
+.. code-block:: console
+
+ $ make flash ESPTOOL_PORT=<port> ESPTOOL_BINDIR=<dir>
+
+.. note:: It is recommended that if this is the first time you are using the
board with NuttX that you perform a complete SPI FLASH erase.
+
+ .. code-block:: console
+
+ $ esptool.py erase_flash
+
+Peripheral Support
+==================
+
+The following list indicates the state of peripherals' support in NuttX:
+
+========== ======= =====
+Peripheral Support NOTES
+========== ======= =====
+GPIO Yes
+UART Yes
+SPI Yes
+I2C No
+CAN/TWAI No
+DMA Yes
+Wifi No
+SPIFLASH Yes
+SPIRAM Yes
+Timers Yes
+Watchdog Yes
+RTC No
+RNG No
+AES No
+eFuse No
+ADC No
+Bluetooth No
+SDIO No
+SD/MMC No
+I2S No
+LCD No
+CAMERA No
+LED_PWM No
+RMT No
+MCPWM No
+Pulse_CNT No
+SHA No
+RSA No
+USB SERIAL Yes
+USB OTG No
+========== ======= =====
+
+Memory Map
+==========
+
+Address Mapping
+---------------
+
+================== ========== ========== =============== ===============
+BUS TYPE START LAST DESCRIPTION NOTES
+================== ========== ========== =============== ===============
+To be added
+================== ========== ========== =============== ===============
+
+Embedded Memory
+---------------
+
+=========== ========== ========== =============== ===============
+BUS TYPE START LAST DESCRIPTION NOTES
+=========== ========== ========== =============== ===============
+To be added
+=========== ========== ========== =============== ===============
+
+Boundary Address (Embedded)
+---------------------------
+
+====================== ========== ========== =============== ===============
+BUS TYPE START LAST DESCRIPTION NOTES
+====================== ========== ========== =============== ===============
+To be added
+====================== ========== ========== =============== ===============
+
+External Memory
+---------------
+
+=========== ========== ========== =============== ===============
+BUS TYPE START LAST DESCRIPTION NOTES
+=========== ========== ========== =============== ===============
+To be added
+=========== ========== ========== =============== ===============
+
+Boundary Address (External)
+---------------------------
+
+To be added
+
+Linker Segments
+---------------
+
++---------------------+------------+------------+------+------------------------------+
+| DESCRIPTION | START | END | ATTR | LINKER SEGMENT NAME
|
++=====================+============+============+======+==============================+
+| To be added | | | |
|
++---------------------+------------+------------+------+------------------------------+
+
+Supported Boards
+================
+
+.. toctree::
+ :glob:
+ :maxdepth: 1
+
+ boards/*/*
