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commit fc22eddc382336f1c1099a68e60bc8996a50619e Author: Abdelatif Guettouche <[email protected]> AuthorDate: Fri Jun 10 13:57:09 2022 +0200 arch/xtensa: Refactor the code that's used to get the pre-exception backtrace. Signed-off-by: Abdelatif Guettouche <[email protected]> --- arch/xtensa/src/common/xtensa_int_handlers.S | 17 +--------------- arch/xtensa/src/common/xtensa_macros.S | 29 ++++++++++++++++++++++++++++ arch/xtensa/src/common/xtensa_user_handler.S | 12 +----------- 3 files changed, 31 insertions(+), 27 deletions(-) diff --git a/arch/xtensa/src/common/xtensa_int_handlers.S b/arch/xtensa/src/common/xtensa_int_handlers.S index c1d2d94850..d8bfc9de25 100644 --- a/arch/xtensa/src/common/xtensa_int_handlers.S +++ b/arch/xtensa/src/common/xtensa_int_handlers.S @@ -192,22 +192,7 @@ g_intstacktop: * before getting here. */ -#ifdef CONFIG_XTENSA_INTBACKTRACE - l32i a3, a12, (4 * REG_A0) /* Copy pre-exception a0 (return address) */ - s32e a3, sp, -16 - l32i a3, a12, (4 * REG_A1) /* Copy pre-exception a1 (stack pointer) */ - s32e a3, sp, -12 - - /* Backtracing only needs a0 and a1, no need to create full base save area. - * Also need to change current frame's return address to point to pre-exception's - * last run instruction. - */ - - rsr a0, EPC_1 + \level - 1 /* return address */ - movi a4, 0xc0000000 /* constant with top 2 bits set (call size) */ - or a0, a0, a4 /* set top 2 bits */ - addx2 a0, a4, a0 /* clear top bit -- simulating call4 size */ -#endif + exception_backtrace a12 \level /* Call xtensa_int_decode passing the address of the register save area * as a parameter (A7). diff --git a/arch/xtensa/src/common/xtensa_macros.S b/arch/xtensa/src/common/xtensa_macros.S index cb57846d1c..5adb3633aa 100644 --- a/arch/xtensa/src/common/xtensa_macros.S +++ b/arch/xtensa/src/common/xtensa_macros.S @@ -92,3 +92,32 @@ .endm +/**************************************************************************** + * Name: exceptin_backtrace + * + * Description: + * Populate the base save area with the pre-exception A0 and SP to be able + * to backtrace from it. + * + ****************************************************************************/ + + .macro exception_backtrace sa level + +#if !defined(__XTENSA_CALL0_ABI__) && defined(CONFIG_XTENSA_INTBACKTRACE) + l32i a3, \sa, (4 * REG_A0) /* Copy pre-exception a0 (return address) */ + s32e a3, sp, -16 + l32i a3, \sa, (4 * REG_A1) /* Copy pre-exception a1 (stack pointer) */ + s32e a3, sp, -12 + + /* Backtracing only needs a0 and a1, no need to create full base save area. + * Also need to change current frame's return address to point to pre-exception's + * last run instruction. + */ + + rsr a0, EPC_1 + \level - 1 /* Return address for debug backtrace */ + movi a4, 0xc0000000 /* Constant with top 2 bits set (call size) */ + or a0, a0, a4 /* Set top 2 bits */ + addx2 a0, a4, a0 /* Clear top bit to simulate a call4 size */ +#endif + + .endm diff --git a/arch/xtensa/src/common/xtensa_user_handler.S b/arch/xtensa/src/common/xtensa_user_handler.S index c2bf3458a3..47adb53634 100644 --- a/arch/xtensa/src/common/xtensa_user_handler.S +++ b/arch/xtensa/src/common/xtensa_user_handler.S @@ -189,17 +189,7 @@ _xtensa_user_handler: * an interrupt stack). */ -#ifdef CONFIG_XTENSA_INTBACKTRACE - l32i a3, a12, (4 * REG_A0) /* Copy pre-exception a0 (return address) */ - s32e a3, sp, -16 - l32i a3, a12, (4 * REG_A1) /* Copy pre-exception a1 (stack pointer) */ - s32e a3, sp, -12 - - rsr a0, EPC_1 /* return address for debug backtrace */ - movi a4, 0xc0000000 /* constant with top 2 bits set (call size) */ - or a0, a0, a4 /* set top 2 bits */ - addx2 a0, a4, a0 /* clear top bit -- thus simulating call4 size */ -#endif + exception_backtrace a12 1 /* Call xtensa_user, passing both the EXCCAUSE and a pointer to the * beginning of the register save area.
